Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +1 −1 Original line number Diff line number Diff line Loading @@ -3230,5 +3230,5 @@ int ipa3_uc_send_enable_flow_control(uint16_t gsi_chid, int ipa3_uc_send_disable_flow_control(void); int ipa3_uc_send_update_flow_control(uint32_t bitmask, uint8_t add_delete); int ipa3_qmi_reg_dereg_for_bw(bool bw_reg); int ipa3_qmi_reg_dereg_for_bw(bool bw_reg, int bw_reg_dereg_type); #endif /* _IPA3_I_H_ */ drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c +51 −10 Original line number Diff line number Diff line Loading @@ -72,6 +72,15 @@ #define IPA_MPM_FLOW_CTRL_DELETE 0 #define IPA_MPM_NUM_OF_INIT_CMD_DESC 2 #define IPA_UC_FC_DB_ADDR 0x1EC2088 #define IPA_MAX_BW_REG_DEREG_CACHE 20 enum bw_reg_dereg_type { BW_VOTE_WAN_NOTIFY = 0, BW_UNVOTE_WAN_NOTIFY = 1, BW_VOTE_PROBE_CB = 2, BW_VOTE_XDCI_ENABLE = 3, BW_UNVOTE_XDCI_DISABLE = 4, }; enum mhip_re_type { MHIP_RE_XFER = 0x2, Loading Loading @@ -387,6 +396,11 @@ struct ipa_mpm_mhi_driver { enum ipa_mpm_remote_state remote_state; }; struct bw_cache { int bw_reg_dereg_type; int ref_count; }; struct ipa_mpm_context { struct ipa_mpm_dev_info dev_info; struct ipa_mpm_mhi_driver md[IPA_MPM_MAX_MHIP_CHAN]; Loading @@ -399,6 +413,8 @@ struct ipa_mpm_context { atomic_t adpl_over_odl_available; atomic_t active_teth_count; atomic_t voted_before; struct bw_cache bw_reg_dereg_cache[IPA_MAX_BW_REG_DEREG_CACHE]; int cache_index; struct device *parent_pdev; struct ipa_smmu_cb_ctx carved_smmu_cb; struct device *mhi_parent_dev; Loading Loading @@ -1937,7 +1953,8 @@ int ipa_mpm_notify_wan_state(struct wan_ioctl_notify_wan_state *state) ipa_mpm_ctx->md[probe_id].teth_state = IPA_MPM_TETH_CONNECTED; /* Register for BW indication from Q6 */ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_WAN_NOTIFY)) IPA_MPM_ERR( "Failed rgstring for QMIBW Ind, might be SSR"); break; Loading Loading @@ -1991,7 +2008,8 @@ int ipa_mpm_notify_wan_state(struct wan_ioctl_notify_wan_state *state) /* De-register for BW indication from Q6*/ if (atomic_read(&ipa_mpm_ctx->active_teth_count) >= 1) { if (!ipa3_qmi_reg_dereg_for_bw(false)) if (!ipa3_qmi_reg_dereg_for_bw(false, BW_UNVOTE_WAN_NOTIFY)) IPA_MPM_DBG( "Failed De-rgstrng QMI BW Indctn,might be SSR"); } else { Loading Loading @@ -2546,7 +2564,10 @@ static int ipa_mpm_mhi_probe_cb(struct mhi_device *mhi_dev, pipe_idx = ipa3_get_ep_mapping(IPA_CLIENT_USB_PROD); ipa3_xdci_ep_delay_rm(pipe_idx); /* Register for BW indication from Q6*/ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (ipa_mpm_ctx->md[probe_id].teth_state == IPA_MPM_TETH_CONNECTED) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_PROBE_CB)) IPA_MPM_DBG( "QMI BW reg Req failed,might be SSR"); } Loading Loading @@ -2906,7 +2927,7 @@ int ipa_mpm_mhip_xdci_pipe_enable(enum ipa_usb_teth_prot xdci_teth_prot) case MHIP_STATUS_NO_OP: ipa_mpm_change_teth_state(probe_id, IPA_MPM_TETH_CONNECTED); /* Register for BW indication from Q6*/ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_XDCI_ENABLE)) IPA_MPM_DBG("Fail regst QMI BW Indctn,might be SSR"); pipe_idx = ipa3_get_ep_mapping(IPA_CLIENT_USB_PROD); Loading Loading @@ -3051,7 +3072,8 @@ int ipa_mpm_mhip_xdci_pipe_disable(enum ipa_usb_teth_prot xdci_teth_prot) ipa_mpm_change_teth_state(probe_id, IPA_MPM_TETH_INIT); /* De-register for BW indication from Q6*/ if (atomic_read(&ipa_mpm_ctx->active_teth_count) >= 1) { if (!ipa3_qmi_reg_dereg_for_bw(false)) if (!ipa3_qmi_reg_dereg_for_bw(false, BW_UNVOTE_XDCI_DISABLE)) IPA_MPM_DBG( "Failed De-rgstrng QMI BW Indctn,might be SSR"); } else { Loading Loading @@ -3182,6 +3204,8 @@ static int ipa_mpm_probe(struct platform_device *pdev) mutex_init(&ipa_mpm_ctx->md[i].mutex); mutex_init(&ipa_mpm_ctx->md[i].mhi_mutex); } mutex_init(&ipa_mpm_ctx->mutex); ipa_mpm_ctx->cache_index = 0; ipa_mpm_ctx->dev_info.pdev = pdev; ipa_mpm_ctx->dev_info.dev = &pdev->dev; Loading Loading @@ -3480,10 +3504,21 @@ int ipa3_mpm_enable_adpl_over_odl(bool enable) return ret; } int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) int ipa3_qmi_reg_dereg_for_bw(bool bw_reg, int bw_reg_dereg_type) { int rt; mutex_lock(&ipa_mpm_ctx->mutex); ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index].bw_reg_dereg_type = bw_reg_dereg_type; ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index].ref_count = atomic_read(&ipa_mpm_ctx->active_teth_count); ipa_mpm_ctx->cache_index = (ipa_mpm_ctx->cache_index + 1) % IPA_MAX_BW_REG_DEREG_CACHE; mutex_unlock(&ipa_mpm_ctx->mutex); if (bw_reg) { atomic_inc(&ipa_mpm_ctx->active_teth_count); if (atomic_read(&ipa_mpm_ctx->active_teth_count) == 1) { Loading @@ -3498,7 +3533,10 @@ int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) atomic_set(&ipa_mpm_ctx->voted_before, 0); return false; } IPA_MPM_DBG("QMI BW regst success"); IPA_MPM_DBG("QMI BW regst success from %d", ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index - 1].bw_reg_dereg_type); } else { IPA_MPM_DBG("bw_change to %d no-op, teth_count = %d", bw_reg, Loading @@ -3517,7 +3555,10 @@ int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) IPA_MPM_ERR("QMI BW de-regst fail, rt= %d", rt); return false; } IPA_MPM_DBG("QMI BW De-regst success"); IPA_MPM_DBG("QMI BW De-regst success %d", ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index - 1].bw_reg_dereg_type); } else { IPA_MPM_DBG("bw_change to %d no-op, teth_count = %d", bw_reg, Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +1 −1 Original line number Diff line number Diff line Loading @@ -3230,5 +3230,5 @@ int ipa3_uc_send_enable_flow_control(uint16_t gsi_chid, int ipa3_uc_send_disable_flow_control(void); int ipa3_uc_send_update_flow_control(uint32_t bitmask, uint8_t add_delete); int ipa3_qmi_reg_dereg_for_bw(bool bw_reg); int ipa3_qmi_reg_dereg_for_bw(bool bw_reg, int bw_reg_dereg_type); #endif /* _IPA3_I_H_ */
drivers/platform/msm/ipa/ipa_v3/ipa_mpm.c +51 −10 Original line number Diff line number Diff line Loading @@ -72,6 +72,15 @@ #define IPA_MPM_FLOW_CTRL_DELETE 0 #define IPA_MPM_NUM_OF_INIT_CMD_DESC 2 #define IPA_UC_FC_DB_ADDR 0x1EC2088 #define IPA_MAX_BW_REG_DEREG_CACHE 20 enum bw_reg_dereg_type { BW_VOTE_WAN_NOTIFY = 0, BW_UNVOTE_WAN_NOTIFY = 1, BW_VOTE_PROBE_CB = 2, BW_VOTE_XDCI_ENABLE = 3, BW_UNVOTE_XDCI_DISABLE = 4, }; enum mhip_re_type { MHIP_RE_XFER = 0x2, Loading Loading @@ -387,6 +396,11 @@ struct ipa_mpm_mhi_driver { enum ipa_mpm_remote_state remote_state; }; struct bw_cache { int bw_reg_dereg_type; int ref_count; }; struct ipa_mpm_context { struct ipa_mpm_dev_info dev_info; struct ipa_mpm_mhi_driver md[IPA_MPM_MAX_MHIP_CHAN]; Loading @@ -399,6 +413,8 @@ struct ipa_mpm_context { atomic_t adpl_over_odl_available; atomic_t active_teth_count; atomic_t voted_before; struct bw_cache bw_reg_dereg_cache[IPA_MAX_BW_REG_DEREG_CACHE]; int cache_index; struct device *parent_pdev; struct ipa_smmu_cb_ctx carved_smmu_cb; struct device *mhi_parent_dev; Loading Loading @@ -1937,7 +1953,8 @@ int ipa_mpm_notify_wan_state(struct wan_ioctl_notify_wan_state *state) ipa_mpm_ctx->md[probe_id].teth_state = IPA_MPM_TETH_CONNECTED; /* Register for BW indication from Q6 */ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_WAN_NOTIFY)) IPA_MPM_ERR( "Failed rgstring for QMIBW Ind, might be SSR"); break; Loading Loading @@ -1991,7 +2008,8 @@ int ipa_mpm_notify_wan_state(struct wan_ioctl_notify_wan_state *state) /* De-register for BW indication from Q6*/ if (atomic_read(&ipa_mpm_ctx->active_teth_count) >= 1) { if (!ipa3_qmi_reg_dereg_for_bw(false)) if (!ipa3_qmi_reg_dereg_for_bw(false, BW_UNVOTE_WAN_NOTIFY)) IPA_MPM_DBG( "Failed De-rgstrng QMI BW Indctn,might be SSR"); } else { Loading Loading @@ -2546,7 +2564,10 @@ static int ipa_mpm_mhi_probe_cb(struct mhi_device *mhi_dev, pipe_idx = ipa3_get_ep_mapping(IPA_CLIENT_USB_PROD); ipa3_xdci_ep_delay_rm(pipe_idx); /* Register for BW indication from Q6*/ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (ipa_mpm_ctx->md[probe_id].teth_state == IPA_MPM_TETH_CONNECTED) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_PROBE_CB)) IPA_MPM_DBG( "QMI BW reg Req failed,might be SSR"); } Loading Loading @@ -2906,7 +2927,7 @@ int ipa_mpm_mhip_xdci_pipe_enable(enum ipa_usb_teth_prot xdci_teth_prot) case MHIP_STATUS_NO_OP: ipa_mpm_change_teth_state(probe_id, IPA_MPM_TETH_CONNECTED); /* Register for BW indication from Q6*/ if (!ipa3_qmi_reg_dereg_for_bw(true)) if (!ipa3_qmi_reg_dereg_for_bw(true, BW_VOTE_XDCI_ENABLE)) IPA_MPM_DBG("Fail regst QMI BW Indctn,might be SSR"); pipe_idx = ipa3_get_ep_mapping(IPA_CLIENT_USB_PROD); Loading Loading @@ -3051,7 +3072,8 @@ int ipa_mpm_mhip_xdci_pipe_disable(enum ipa_usb_teth_prot xdci_teth_prot) ipa_mpm_change_teth_state(probe_id, IPA_MPM_TETH_INIT); /* De-register for BW indication from Q6*/ if (atomic_read(&ipa_mpm_ctx->active_teth_count) >= 1) { if (!ipa3_qmi_reg_dereg_for_bw(false)) if (!ipa3_qmi_reg_dereg_for_bw(false, BW_UNVOTE_XDCI_DISABLE)) IPA_MPM_DBG( "Failed De-rgstrng QMI BW Indctn,might be SSR"); } else { Loading Loading @@ -3182,6 +3204,8 @@ static int ipa_mpm_probe(struct platform_device *pdev) mutex_init(&ipa_mpm_ctx->md[i].mutex); mutex_init(&ipa_mpm_ctx->md[i].mhi_mutex); } mutex_init(&ipa_mpm_ctx->mutex); ipa_mpm_ctx->cache_index = 0; ipa_mpm_ctx->dev_info.pdev = pdev; ipa_mpm_ctx->dev_info.dev = &pdev->dev; Loading Loading @@ -3480,10 +3504,21 @@ int ipa3_mpm_enable_adpl_over_odl(bool enable) return ret; } int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) int ipa3_qmi_reg_dereg_for_bw(bool bw_reg, int bw_reg_dereg_type) { int rt; mutex_lock(&ipa_mpm_ctx->mutex); ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index].bw_reg_dereg_type = bw_reg_dereg_type; ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index].ref_count = atomic_read(&ipa_mpm_ctx->active_teth_count); ipa_mpm_ctx->cache_index = (ipa_mpm_ctx->cache_index + 1) % IPA_MAX_BW_REG_DEREG_CACHE; mutex_unlock(&ipa_mpm_ctx->mutex); if (bw_reg) { atomic_inc(&ipa_mpm_ctx->active_teth_count); if (atomic_read(&ipa_mpm_ctx->active_teth_count) == 1) { Loading @@ -3498,7 +3533,10 @@ int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) atomic_set(&ipa_mpm_ctx->voted_before, 0); return false; } IPA_MPM_DBG("QMI BW regst success"); IPA_MPM_DBG("QMI BW regst success from %d", ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index - 1].bw_reg_dereg_type); } else { IPA_MPM_DBG("bw_change to %d no-op, teth_count = %d", bw_reg, Loading @@ -3517,7 +3555,10 @@ int ipa3_qmi_reg_dereg_for_bw(bool bw_reg) IPA_MPM_ERR("QMI BW de-regst fail, rt= %d", rt); return false; } IPA_MPM_DBG("QMI BW De-regst success"); IPA_MPM_DBG("QMI BW De-regst success %d", ipa_mpm_ctx->bw_reg_dereg_cache[ ipa_mpm_ctx->cache_index - 1].bw_reg_dereg_type); } else { IPA_MPM_DBG("bw_change to %d no-op, teth_count = %d", bw_reg, Loading