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Commit 3fc9fc4c authored by vikrant mhaske's avatar vikrant mhaske Committed by Alex Deucher
Browse files

drm/amd/display: DPP CM ICSC AYCRCB8888 format support 



[why]
Diags has POR to run the video workload using AYCRCB8888 through DCN;
capture it through DWB and send it to VCN hardware to encode

[how]
added the code to support this format so that DPP ICSC will be able to
convert it from YUV444 to internal RGB and DWB OCSC will be able to
convert from internal RGB to YUV420

Signed-off-by: default avatarvikrant mhaske <vikrant.mhaske@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 278ca8d6

drivers/gpu/drm/amd/display/dc/dc_hw_types.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -192,7 +192,7 @@ enum surface_pixel_format { 
	/*swaped & float*/

	/*swaped & float*/

	SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F,

	SURFACE_PIXEL_FORMAT_GRPH_ABGR16161616F,

	/*grow graphics here if necessary */

	/*grow graphics here if necessary */



	SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888,

	SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,

	SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,

	SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr =

	SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr =

		SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,

		SURFACE_PIXEL_FORMAT_VIDEO_BEGIN,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -294,6 +294,10 @@ void hubp1_program_pixel_format( 
		REG_UPDATE(DCSURF_SURFACE_CONFIG,

		REG_UPDATE(DCSURF_SURFACE_CONFIG,

				SURFACE_PIXEL_FORMAT, 66);

				SURFACE_PIXEL_FORMAT, 66);

		break;

		break;

	case SURFACE_PIXEL_FORMAT_VIDEO_AYCrCb8888:

		REG_UPDATE(DCSURF_SURFACE_CONFIG,

				SURFACE_PIXEL_FORMAT, 12);

		break;

	default:

	default:

		BREAK_TO_DEBUGGER();

		BREAK_TO_DEBUGGER();

		break;

		break;