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Commit 3faa1bb2 authored by Gary Bisson's avatar Gary Bisson Committed by Shawn Guo
Browse files

ARM: dts: imx: add Boundary Devices Nitrogen6_SOM2 support 

SoM based on i.MX6 Quad with 1GB of DDR3.

https://boundarydevices.com/product/nit6x-som-v2/



Signed-off-by: default avatarGary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 801173fe

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -388,6 +388,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ 
	imx6q-marsboard.dtb \

	imx6q-nitrogen6x.dtb \

	imx6q-nitrogen6_max.dtb \

	imx6q-nitrogen6_som2.dtb \

	imx6q-novena.dtb \

	imx6q-phytec-pbab01.dtb \

	imx6q-rex-pro.dtb \

arch/arm/boot/dts/imx6q-nitrogen6_som2.dts

0 → 100644
+53 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2016 Boundary Devices, Inc.

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License

 *     version 2 as published by the Free Software Foundation.

 *

 *     This file is distributed in the hope that it will be useful

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */

/dts-v1/;



#include "imx6q.dtsi"

#include "imx6qdl-nitrogen6_som2.dtsi"



/ {

	model = "Boundary Devices i.MX6 Quad Nitrogen6_SOM2 Board";

	compatible = "boundary,imx6q-nitrogen6_som2", "fsl,imx6q";

};



&sata {

	status = "okay";

};

arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi

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Original line number Diff line number Diff line 
/*

 * Copyright 2016 Boundary Devices, Inc.

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual

 * licensing only applies to this file, and not this project as a

 * whole.

 *

 *  a) This file is free software; you can redistribute it and/or

 *     modify it under the terms of the GNU General Public License

 *     version 2 as published by the Free Software Foundation.

 *

 *     This file is distributed in the hope that it will be useful

 *     but WITHOUT ANY WARRANTY; without even the implied warranty of

 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 *     GNU General Public License for more details.

 *

 * Or, alternatively

 *

 *  b) Permission is hereby granted, free of charge, to any person

 *     obtaining a copy of this software and associated documentation

 *     files (the "Software"), to deal in the Software without

 *     restriction, including without limitation the rights to use

 *     copy, modify, merge, publish, distribute, sublicense, and/or

 *     sell copies of the Software, and to permit persons to whom the

 *     Software is furnished to do so, subject to the following

 *     conditions:

 *

 *     The above copyright notice and this permission notice shall be

 *     included in all copies or substantial portions of the Software.

 *

 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND

 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES

 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND

 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT

 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY

 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 *     OTHER DEALINGS IN THE SOFTWARE.

 */

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>



/ {

	chosen {

		stdout-path = &uart2;

	};



	memory {

		reg = <0x10000000 0x40000000>;

	};



	backlight_lcd: backlight-lcd {

		compatible = "pwm-backlight";

		pwms = <&pwm1 0 5000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;

		default-brightness-level = <7>;

		power-supply = <&reg_3p3v>;

		status = "okay";

	};



	backlight_lvds0: backlight-lvds0 {

		compatible = "pwm-backlight";

		pwms = <&pwm4 0 5000000>;

		brightness-levels = <0 4 8 16 32 64 128 255>;

		default-brightness-level = <7>;

		power-supply = <&reg_3p3v>;

		status = "okay";

	};



	backlight_lvds1: backlight-lvds1 {

		compatible = "gpio-backlight";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_backlight_lvds1>;

		gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>;

		default-on;

		status = "okay";

	};



	gpio-keys {

		compatible = "gpio-keys";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_gpio_keys>;



		power {

			label = "Power Button";

			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_POWER>;

			wakeup-source;

		};



		menu {

			label = "Menu";

			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_MENU>;

		};



		home {

			label = "Home";

			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_HOME>;

		};



		back {

			label = "Back";

			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_BACK>;

		};



		volume-up {

			label = "Volume Up";

			gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_VOLUMEUP>;

		};



		volume-down {

			label = "Volume Down";

			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_VOLUMEDOWN>;

		};

	};



	lcd_display: display@di0 {

		compatible = "fsl,imx-parallel-display";

		#address-cells = <1>;

		#size-cells = <0>;

		interface-pix-fmt = "bgr666";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_j15>;

		status = "okay";



		port@0 {

			reg = <0>;



			lcd_display_in: endpoint {

				remote-endpoint = <&ipu1_di0_disp0>;

			};

		};



		port@1 {

			reg = <1>;



			lcd_display_out: endpoint {

				remote-endpoint = <&lcd_panel_in>;

			};

		};

	};



	panel-lcd {

		compatible = "okaya,rs800480t-7x0gp";

		backlight = <&backlight_lcd>;



		port {

			lcd_panel_in: endpoint {

				remote-endpoint = <&lcd_display_out>;

			};

		};

	};



	panel-lvds0 {

		compatible = "hannstar,hsd100pxn1";

		backlight = <&backlight_lvds0>;



		port {

			panel_in_lvds0: endpoint {

				remote-endpoint = <&lvds0_out>;

			};

		};

	};



	panel-lvds1 {

		compatible = "hannstar,hsd100pxn1";

		backlight = <&backlight_lvds1>;



		port {

			panel_in_lvds1: endpoint {

				remote-endpoint = <&lvds1_out>;

			};

		};

	};



	reg_1p8v: regulator-1v8 {

		compatible = "regulator-fixed";

		regulator-name = "1P8V";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-always-on;

	};



	reg_2p5v: regulator-2v5 {

		compatible = "regulator-fixed";

		regulator-name = "2P5V";

		regulator-min-microvolt = <2500000>;

		regulator-max-microvolt = <2500000>;

		regulator-always-on;

	};



	reg_3p3v: regulator-3v3 {

		compatible = "regulator-fixed";

		regulator-name = "3P3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		regulator-always-on;

	};



	reg_can_xcvr: regulator-can-xcvr {

		compatible = "regulator-fixed";

		regulator-name = "CAN XCVR";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_can_xcvr>;

		gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;

	};



	reg_usb_h1_vbus: regulator-usb-h1-vbus {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usbh1>;

		regulator-name = "usb_h1_vbus";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;

		enable-active-high;

		regulator-always-on;

	};



	reg_usb_otg_vbus: regulator-usb-otg-vbus {

		compatible = "regulator-fixed";

		regulator-name = "usb_otg_vbus";

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	reg_wlan_vmmc: regulator-wlan-vmmc {

		compatible = "regulator-fixed";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_wlan_vmmc>;

		regulator-name = "reg_wlan_vmmc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;

		startup-delay-us = <70000>;

		enable-active-high;

	};



	sound {

		compatible = "fsl,imx6q-nitrogen6_som2-sgtl5000",

			     "fsl,imx-audio-sgtl5000";

		model = "imx6q-nitrogen6_som2-sgtl5000";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_sgtl5000>;

		ssi-controller = <&ssi1>;

		audio-codec = <&codec>;

		audio-routing =

			"MIC_IN", "Mic Jack",

			"Mic Jack", "Mic Bias",

			"Headphone Jack", "HP_OUT";

		mux-int-port = <1>;

		mux-ext-port = <3>;

	};

};



&audmux {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_audmux>;

	status = "okay";

};



&can1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_can1>;

	xceiver-supply = <&reg_can_xcvr>;

	status = "okay";

};



&clks {

	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,

			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>;

	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,

				 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;

};



&ecspi1 {

	fsl,spi-num-chipselects = <1>;

	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_ecspi1>;

	status = "okay";



	flash: m25p80@0 {

		compatible = "microchip,sst25vf016b";

		spi-max-frequency = <20000000>;

		reg = <0>;

	};

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rgmii";

	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,

			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;

	fsl,err006687-workaround-present;

	status = "okay";

};



&hdmi {

	ddc-i2c-bus = <&i2c2>;

	status = "okay";

};



&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c1>;

	status = "okay";



	codec: sgtl5000@0a {

		compatible = "fsl,sgtl5000";

		reg = <0x0a>;

		clocks = <&clks IMX6QDL_CLK_CKO>;

		VDDA-supply = <&reg_2p5v>;

		VDDIO-supply = <&reg_3p3v>;

	};



	rtc@68 {

		compatible = "st,rv4162";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_rv4162>;

		reg = <0x68>;

		interrupts-extended = <&gpio6 7 IRQ_TYPE_LEVEL_LOW>;

	};

};



&i2c2 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c2>;

	status = "okay";

};



&i2c3 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c3>;

	status = "okay";



	touchscreen@04 {

		compatible = "eeti,egalax_ts";

		reg = <0x04>;

		interrupt-parent = <&gpio1>;

		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;

		wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;

	};



	touchscreen@38 {

		compatible = "edt,edt-ft5x06";

		reg = <0x38>;

		interrupt-parent = <&gpio1>;

		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;

	};

};



&iomuxc {

	pinctrl_audmux: audmuxgrp {

		fsl,pins = <

			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0

			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0

			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0

			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0

		>;

	};



	pinctrl_backlight_lvds1: backlight-lvds1grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_EB3__GPIO2_IO31		0x0b0b0

		>;

	};



	pinctrl_can1: can1grp {

		fsl,pins = <

			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b0

			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b0

		>;

	};



	pinctrl_can_xcvr: can-xcvrgrp {

		fsl,pins = <

			/* Flexcan XCVR enable */

			MX6QDL_PAD_GPIO_2__GPIO1_IO02		0x0b0b0

		>;

	};



	pinctrl_ecspi1: ecspi1grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1

			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1

			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1

			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1

		>;

	};



	pinctrl_enet: enetgrp {

		fsl,pins = <

			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0

			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x100b0

			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x100b0

			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x100b0

			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x100b0

			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x100b0

			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x100b0

			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x100b0

			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0

			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x130b0

			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0

			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x130b0

			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0

			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x130b0

			MX6QDL_PAD_ENET_RXD0__GPIO1_IO27	0x030b0

			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b0

			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1

		>;

	};



	pinctrl_gpio_keys: gpio-keysgrp {

		fsl,pins = <

			/* Power Button */

			MX6QDL_PAD_NANDF_D3__GPIO2_IO03		0x1b0b0

			/* Menu Button */

			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1b0b0

			/* Home Button */

			MX6QDL_PAD_NANDF_D4__GPIO2_IO04		0x1b0b0

			/* Back Button */

			MX6QDL_PAD_NANDF_D2__GPIO2_IO02		0x1b0b0

			/* Volume Up Button */

			MX6QDL_PAD_GPIO_18__GPIO7_IO13		0x1b0b0

			/* Volume Down Button */

			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0

		>;

	};



	pinctrl_i2c1: i2c1grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D21__I2C1_SCL	0x4001b8b1

			MX6QDL_PAD_EIM_D28__I2C1_SDA	0x4001b8b1

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1

			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_5__I2C3_SCL	0x4001b8b1

			MX6QDL_PAD_GPIO_16__I2C3_SDA	0x4001b8b1

			MX6QDL_PAD_GPIO_9__GPIO1_IO09	0x1b0b0

		>;

	};



	pinctrl_i2c3mux: i2c3muxgrp {

		fsl,pins = <

			/* PCIe I2C enable */

			MX6QDL_PAD_EIM_OE__GPIO2_IO25	0x000b0

		>;

	};



	pinctrl_j15: j15grp {

		fsl,pins = <

			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10

			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10

			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10

			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10

			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10

			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10

			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10

			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10

			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10

			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10

			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10

			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10

			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10

			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10

			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10

			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10

			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10

			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10

			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10

			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10

			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10

			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10

			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10

			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10

			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10

			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10

			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10

			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10

		>;

	};



	pinctrl_pcie: pciegrp {

		fsl,pins = <

			/* PCIe reset */

			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31	0x030b0

			MX6QDL_PAD_EIM_DA4__GPIO3_IO04	0x030b0

		>;

	};



	pinctrl_pwm1: pwm1grp {

		fsl,pins = <

			MX6QDL_PAD_SD1_DAT3__PWM1_OUT	0x030b1

		>;

	};



	pinctrl_pwm3: pwm3grp {

		fsl,pins = <

			MX6QDL_PAD_SD1_DAT1__PWM3_OUT	0x030b1

		>;

	};



	pinctrl_pwm4: pwm4grp {

		fsl,pins = <

			MX6QDL_PAD_SD1_CMD__PWM4_OUT	0x030b1

		>;

	};



	pinctrl_rv4162: rv4162grp {

		fsl,pins = <

			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07	0x1b0b0

		>;

	};



	pinctrl_sgtl5000: sgtl5000grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0

			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x130b0

			MX6QDL_PAD_EIM_DA2__GPIO3_IO02		0x130b0

			MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24	0x130b0

		>;

	};



	pinctrl_uart1: uart1grp {

		fsl,pins = <

			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1

			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1

		>;

	};



	pinctrl_uart2: uart2grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1

		>;

	};



	pinctrl_uart3: uart3grp {

		fsl,pins = <

			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1

			MX6QDL_PAD_EIM_D23__UART3_CTS_B		0x1b0b1

			MX6QDL_PAD_EIM_D31__UART3_RTS_B		0x1b0b1

		>;

	};



	pinctrl_usbh1: usbh1grp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x030b0

		>;

	};



	pinctrl_usbotg: usbotggrp {

		fsl,pins = <

			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059

			MX6QDL_PAD_KEY_COL4__USB_OTG_OC		0x1b0b0

			/* power enable, high active */

			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x030b0

		>;

	};



	pinctrl_usdhc2: usdhc2grp {

		fsl,pins = <

			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x10071

			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17071

			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x17071

			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x17071

			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x17071

			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x17071

		>;

	};



	pinctrl_usdhc3: usdhc3grp {

		fsl,pins = <

			MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10071

			MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17071

			MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17071

			MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17071

			MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17071

			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17071

			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0

		>;

	};



	pinctrl_usdhc4: usdhc4grp {

		fsl,pins = <

			MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059

			MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059

			MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059

			MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059

			MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059

			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059

			MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059

			MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059

			MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059

			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059

		>;

	};



	pinctrl_wlan_vmmc: wlan-vmmcgrp {

		fsl,pins = <

			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x100b0

			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x030b0

			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x030b0

			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0

		>;

	};

};



&ipu1_di0_disp0 {

	remote-endpoint = <&lcd_display_in>;

};



&ldb {

	status = "okay";



	lvds-channel@0 {

		fsl,data-mapping = "spwg";

		fsl,data-width = <18>;

		status = "okay";



		port@4 {

			reg = <4>;



			lvds0_out: endpoint {

				remote-endpoint = <&panel_in_lvds0>;

			};

		};

	};



	lvds-channel@1 {

		fsl,data-mapping = "spwg";

		fsl,data-width = <18>;

		status = "okay";



		port@4 {

			reg = <4>;



			lvds1_out: endpoint {

				remote-endpoint = <&panel_in_lvds1>;

			};

		};

	};

};



&pcie {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pcie>;

	reset-gpio = <&gpio6 31 GPIO_ACTIVE_LOW>;

	status = "okay";

};



&pwm1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm1>;

	status = "okay";

};



&pwm3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm3>;

	status = "okay";

};



&pwm4 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_pwm4>;

	status = "okay";

};



&ssi1 {

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	status = "okay";

};



&uart2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart2>;

	status = "okay";

};



&uart3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart3>;

	uart-has-rtscts;

	status = "okay";

};



&usbh1 {

	vbus-supply = <&reg_usb_h1_vbus>;

	status = "okay";

};



&usbotg {

	vbus-supply = <&reg_usb_otg_vbus>;

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usbotg>;

	disable-over-current;

	status = "okay";

};



&usdhc2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc2>;

	bus-width = <4>;

	non-removable;

	vmmc-supply = <&reg_wlan_vmmc>;

	cap-power-off-card;

	keep-power-in-suspend;

	status = "okay";



	#address-cells = <1>;

	#size-cells = <0>;

	wlcore: wlcore@2 {

		compatible = "ti,wl1271";

		reg = <2>;

		interrupt-parent = <&gpio6>;

		interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;

		ref-clock-frequency = <38400000>;

	};

};



&usdhc3 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc3>;

	cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;

	bus-width = <4>;

	vmmc-supply = <&reg_3p3v>;

	status = "okay";

};



&usdhc4 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_usdhc4>;

	bus-width = <8>;

	non-removable;

	vmmc-supply = <&reg_1p8v>;

	keep-power-in-suspend;

	status = "okay";

};