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Commit 3de84e06 authored by Shravan Nevatia's avatar Shravan Nevatia
Browse files

msm: camera: csiphy: Update common sequence for csiphy v1.2 



Add a high-to-low transition in the CTRL0 register
during the common power-up sequence.

CRs-Fixed: 2580437
Change-Id: I66541d3d787fa2f161e5d8e647fb11c8075a1947
Signed-off-by: default avatarShravan Nevatia <snevatia@codeaurora.org>
parent a838b9ec

drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_hwreg.h

+2 −1
Original line number Diff line number Diff line
@@ -12,7 +12,7 @@ struct csiphy_reg_parms_t csiphy_v1_2 = { 
	.mipi_csiphy_interrupt_status0_addr = 0x8B0,

	.mipi_csiphy_interrupt_clear0_addr = 0x858,

	.mipi_csiphy_glbl_irq_cmd_addr = 0x828,

	.csiphy_common_array_size = 6,

	.csiphy_common_array_size = 7,

	.csiphy_reset_array_size = 5,

	.csiphy_2ph_config_array_size = 18,

	.csiphy_3ph_config_array_size = 33,
@@ -24,6 +24,7 @@ struct csiphy_reg_t csiphy_common_reg_1_2[] = { 
	{0x0814, 0xd5, 0x00, CSIPHY_LANE_ENABLE},

	{0x0818, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x081C, 0x5A, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x0800, 0x03, 0x01, CSIPHY_DEFAULT_PARAMS},

	{0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x0884, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},

	{0x0824, 0x72, 0x00, CSIPHY_2PH_REGS},