Loading drivers/rpmsg/qcom_glink_smem.c +14 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,12 @@ struct glink_smem_pipe { #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native) static void glink_smem_rx_reset(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); *pipe->tail = 0; } static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); Loading Loading @@ -123,6 +129,12 @@ static void glink_smem_rx_advance(struct qcom_glink_pipe *np, *pipe->tail = cpu_to_le32(tail); } static void glink_smem_tx_reset(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); *pipe->head = 0; } static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); Loading Loading @@ -282,11 +294,13 @@ struct qcom_glink *qcom_glink_smem_register(struct device *parent, goto err_put_dev; } rx_pipe->native.reset = glink_smem_rx_reset; rx_pipe->native.avail = glink_smem_rx_avail; rx_pipe->native.peak = glink_smem_rx_peak; rx_pipe->native.advance = glink_smem_rx_advance; rx_pipe->remote_pid = remote_pid; tx_pipe->native.reset = glink_smem_tx_reset; tx_pipe->native.avail = glink_smem_tx_avail; tx_pipe->native.write = glink_smem_tx_write; tx_pipe->remote_pid = remote_pid; Loading Loading
drivers/rpmsg/qcom_glink_smem.c +14 −0 Original line number Diff line number Diff line Loading @@ -47,6 +47,12 @@ struct glink_smem_pipe { #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native) static void glink_smem_rx_reset(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); *pipe->tail = 0; } static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); Loading Loading @@ -123,6 +129,12 @@ static void glink_smem_rx_advance(struct qcom_glink_pipe *np, *pipe->tail = cpu_to_le32(tail); } static void glink_smem_tx_reset(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); *pipe->head = 0; } static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np) { struct glink_smem_pipe *pipe = to_smem_pipe(np); Loading Loading @@ -282,11 +294,13 @@ struct qcom_glink *qcom_glink_smem_register(struct device *parent, goto err_put_dev; } rx_pipe->native.reset = glink_smem_rx_reset; rx_pipe->native.avail = glink_smem_rx_avail; rx_pipe->native.peak = glink_smem_rx_peak; rx_pipe->native.advance = glink_smem_rx_advance; rx_pipe->remote_pid = remote_pid; tx_pipe->native.reset = glink_smem_tx_reset; tx_pipe->native.avail = glink_smem_tx_avail; tx_pipe->native.write = glink_smem_tx_write; tx_pipe->remote_pid = remote_pid; Loading