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Commit 3ca63f36 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors 



V{PEND,PROP}BASER being 64bit registers, they need some ad-hoc
accessors on 32bit, specially given that VPENDBASER contains
a Valid bit, making the access a bit convoluted.

Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent eb78192b

arch/arm/include/asm/arch_gicv3.h

+28 −0
Original line number Diff line number Diff line
@@ -291,5 +291,33 @@ static inline u64 __gic_readq_nonatomic(const volatile void __iomem *addr) 
 */

#define gits_write_cwriter(v, c)	__gic_writeq_nonatomic(v, c)



/*

 * GITS_VPROPBASER - hi and lo bits may be accessed independently.

 */

#define gits_write_vpropbaser(v, c)	__gic_writeq_nonatomic(v, c)



/*

 * GITS_VPENDBASER - the Valid bit must be cleared before changing

 * anything else.

 */

static inline void gits_write_vpendbaser(u64 val, void * __iomem addr)

{

	u32 tmp;



	tmp = readl_relaxed(addr + 4);

	if (tmp & (GICR_VPENDBASER_Valid >> 32)) {

		tmp &= ~(GICR_VPENDBASER_Valid >> 32);

		writel_relaxed(tmp, addr + 4);

	}



	/*

	 * Use the fact that __gic_writeq_nonatomic writes the second

	 * half of the 64bit quantity after the first.

	 */

	__gic_writeq_nonatomic(val, addr);

}



#define gits_read_vpendbaser(c)		__gic_readq_nonatomic(c)



#endif /* !__ASSEMBLY__ */

#endif /* !__ASM_ARCH_GICV3_H */

arch/arm64/include/asm/arch_gicv3.h

+5 −0
Original line number Diff line number Diff line
@@ -133,5 +133,10 @@ static inline void gic_write_bpr1(u32 val) 
#define gicr_write_pendbaser(v, c)	writeq_relaxed(v, c)

#define gicr_read_pendbaser(c)		readq_relaxed(c)



#define gits_write_vpropbaser(v, c)	writeq_relaxed(v, c)



#define gits_write_vpendbaser(v, c)	writeq_relaxed(v, c)

#define gits_read_vpendbaser(c)		readq_relaxed(c)



#endif /* __ASSEMBLY__ */

#endif /* __ASM_ARCH_GICV3_H */

include/linux/irqchip/arm-gic-v3.h

+5 −0
Original line number Diff line number Diff line
@@ -212,6 +212,11 @@ 
#define LPI_PROP_GROUP1			(1 << 1)

#define LPI_PROP_ENABLED		(1 << 0)



#define GICR_VPENDBASER_Dirty		(1ULL << 60)

#define GICR_VPENDBASER_PendingLast	(1ULL << 61)

#define GICR_VPENDBASER_IDAI		(1ULL << 62)

#define GICR_VPENDBASER_Valid		(1ULL << 63)



/*

 * ITS registers, offsets from ITS_base

 */