Merge tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux into drm-misc-next (3c390df3) · Commits · e / devices / android_kernel_fairphone_FP4

.mailmap

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		@@ -99,6 +99,8 @@ Linas Vepstas <linas@austin.ibm.com>
		Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
		Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
		Mark Brown <broonie@sirena.org.uk>
		Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
		Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
		Matthieu CASTET <castet.matthieu@free.fr>
		Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
		Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
		@@ -171,6 +173,7 @@ Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
		Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
		Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
		Takashi YOSHII <takashi.yoshii.zj@renesas.com>
		Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
		Yusuke Goda <goda.yusuke@renesas.com>
		Gustavo Padovan <gustavo@las.ic.unicamp.br>
		Gustavo Padovan <padovan@profusion.mobi>

Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt

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		Renesas Gen3 DWC HDMI TX Encoder
		================================

		The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
		with a companion PHY IP.

		These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
		Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
		following device-specific properties.


		Required properties:

		- compatible : Shall contain one or more of
		- "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
		- "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX

		When compatible with generic versions, nodes must list the SoC-specific
		version corresponding to the platform first, followed by the
		family-specific version.

		- reg: See dw_hdmi.txt.
		- interrupts: HDMI interrupt number
		- clocks: See dw_hdmi.txt.
		- clock-names: Shall contain "iahb" and "isfr" as defined in dw_hdmi.txt.
		- ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 0
		corresponding to the video input of the controller and one port numbered 1
		corresponding to its HDMI output. Each port shall have a single endpoint.

		Optional properties:

		- power-domains: Shall reference the power domain that contains the DWC HDMI,
		if any.


		Example:

		hdmi0: hdmi0@fead0000 {
		compatible = "renesas,r8a7795-dw-hdmi";
		reg = <0 0xfead0000 0 0x10000>;
		interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>;
		clock-names = "iahb", "isfr";
		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
		status = "disabled";

		ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
		reg = <0>;
		dw_hdmi0_in: endpoint {
		remote-endpoint = <&du_out_hdmi0>;
		};
		};
		port@1 {
		reg = <1>;
		rcar_dw_hdmi0_out: endpoint {
		remote-endpoint = <&hdmi0_con>;
		};
		};
		};
		};

		hdmi0-out {
		compatible = "hdmi-connector";
		label = "HDMI0 OUT";
		type = "a";

		port {
		hdmi0_con: endpoint {
		remote-endpoint = <&rcar_dw_hdmi0_out>;
		};
		};
		};

Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt

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		@@ -40,6 +40,7 @@ Required properties (all function blocks):
		"mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
		"mediatek,<chip>-disp-mutex" - display mutex
		"mediatek,<chip>-disp-od" - overdrive
		the supported chips are mt2701 and mt8173.
		- reg: Physical base address and length of the function block register space
		- interrupts: The interrupt signal from the function block (required, except for
		merge and split function blocks).
		@@ -54,6 +55,7 @@ Required properties (DMA function blocks):
		"mediatek,<chip>-disp-ovl"
		"mediatek,<chip>-disp-rdma"
		"mediatek,<chip>-disp-wdma"
		the supported chips are mt2701 and mt8173.
		- larb: Should contain a phandle pointing to the local arbiter device as defined
		in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
		- iommus: Should point to the respective IOMMU block with master port as

Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

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		@@ -7,6 +7,7 @@ channel output.

		Required properties:
		- compatible: "mediatek,<chip>-dsi"
		the supported chips are mt2701 and mt8173.
		- reg: Physical base address and length of the controller's registers
		- interrupts: The interrupt signal from the function block.
		- clocks: device clocks
		@@ -25,6 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.

		Required properties:
		- compatible: "mediatek,<chip>-mipi-tx"
		the supported chips are mt2701 and mt8173.
		- reg: Physical base address and length of the controller's registers
		- clocks: PLL reference clock
		- clock-output-names: name of the output clock line to the DSI encoder

Documentation/devicetree/bindings/display/panel/ampire,am-480272h3tmqw-t01h.txt

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		Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel

		This binding is compatible with the simple-panel binding, which is specified
		in simple-panel.txt in this directory.

		Required properties:
		- compatible: should be "ampire,am-480272h3tmqw-t01h"

		Optional properties:
		- power-supply: regulator to provide the supply voltage
		- enable-gpios: GPIO pin to enable or disable the panel
		- backlight: phandle of the backlight device attached to the panel

		Optional nodes:
		- Video port for RGB input.

		Example:
		panel_rgb: panel-rgb {
		compatible = "ampire,am-480272h3tmqw-t01h";
		enable-gpios = <&gpioa 8 1>;
		port {
		panel_in_rgb: endpoint {
		remote-endpoint = <&controller_out_rgb>;
		};
		};
		};