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Commit 3c2bfbaa authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm 

Pull ARM fixes from Russell King:
 "Three more fixes:

   - Fix the previous fix merged in the last pull for the Thumb2
     decompressor.

   - A fix from Vladimir to correctly identify the V7M cache type.

   - The optimised 3G vmsplit case does not work with LPAE, so don't
     allow this to be selected for LPAE configurations"

* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8682/1: V7M: Set cacheid iff DminLine or IminLine is nonzero
  ARM: 8681/1: make VMSPLIT_3G_OPT depends on !ARM_LPAE
  ARM: 8680/1: boot/compressed: fix inappropriate Thumb2 mnemonic for __nop
parents da8b14e4 d360a687

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -1416,6 +1416,7 @@ choice 
	config VMSPLIT_3G

		bool "3G/1G user/kernel split"

	config VMSPLIT_3G_OPT

		depends on !ARM_LPAE

		bool "3G/1G user/kernel split (for full 1G low memory)"

	config VMSPLIT_2G

		bool "2G/2G user/kernel split"

arch/arm/boot/compressed/efi-header.S

+2 −1
Original line number Diff line number Diff line
@@ -17,7 +17,8 @@ 
		@ there.

		.inst	'M' | ('Z' << 8) | (0x1310 << 16)   @ tstne r0, #0x4d000

#else

		W(mov)	r0, r0

 AR_CLASS(	mov	r0, r0		)

  M_CLASS(	nop.w			)

#endif

		.endm

arch/arm/kernel/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -315,7 +315,7 @@ static void __init cacheid_init(void) 
	if (arch >= CPU_ARCH_ARMv6) {

		unsigned int cachetype = read_cpuid_cachetype();



		if ((arch == CPU_ARCH_ARMv7M) && !cachetype) {

		if ((arch == CPU_ARCH_ARMv7M) && !(cachetype & 0xf000f)) {

			cacheid = 0;

		} else if ((cachetype & (7 << 29)) == 4 << 29) {

			/* ARMv7 register format */