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Commit 3bd14ae9 authored by Xing Zheng's avatar Xing Zheng Committed by Heiko Stuebner
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clk: rockchip: fix incorrect parent for rk3399's {c,g}pll_aclk_perihp_src 



There was a typo, swapping 'c' <--> 'g'.

Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Signed-off-by: default avatarBrian Norris <briannorris@chromium.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 176df69c

drivers/clk/rockchip/clk-rk3399.c

+2 −2
Original line number Diff line number Diff line
@@ -832,9 +832,9 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { 
			RK3399_CLKGATE_CON(13), 1, GFLAGS),



	/* perihp */

	GATE(0, "cpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED,

	GATE(0, "cpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED,

			RK3399_CLKGATE_CON(5), 0, GFLAGS),

	GATE(0, "gpll_aclk_perihp_src", "cpll", CLK_IGNORE_UNUSED,

	GATE(0, "gpll_aclk_perihp_src", "gpll", CLK_IGNORE_UNUSED,

			RK3399_CLKGATE_CON(5), 1, GFLAGS),

	COMPOSITE(ACLK_PERIHP, "aclk_perihp", mux_aclk_perihp_p, CLK_IGNORE_UNUSED,

			RK3399_CLKSEL_CON(14), 7, 1, MFLAGS, 0, 5, DFLAGS,