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Commit 3ba43a59 authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: underflow/blankscreen recovery 



[Description]
for any reason, if driver detects HUBP underflow,
if a debug option enabled to enable recovery.
it will kick in a sequence of recovery.

Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0002d3ac

drivers/gpu/drm/amd/display/dc/dc.h

+2 −0
Original line number Diff line number Diff line
@@ -239,6 +239,8 @@ struct dc_debug { 
	bool az_endpoint_mute_only;

	bool always_use_regamma;

	bool p010_mpo_support;

	bool recovery_enabled;



};

struct dc_state;

struct resource_pool;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c

+8 −0
Original line number Diff line number Diff line
@@ -476,6 +476,14 @@ void hubbub1_toggle_watermark_change_req(struct hubbub *hubbub) 
			DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, watermark_change_req);

}



void hubbub1_soft_reset(struct hubbub *hubbub, bool reset)

{

	uint32_t reset_en = reset ? 1 : 0;



	REG_UPDATE(DCHUBBUB_SOFT_RESET,

			DCHUBBUB_GLOBAL_SOFT_RESET, reset_en);

}



static bool hubbub1_dcc_support_swizzle(

		enum swizzle_mode_values swizzle,

		unsigned int bytes_per_element,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h

+6 −1
Original line number Diff line number Diff line
@@ -48,7 +48,8 @@ 
	SR(DCHUBBUB_ARB_DF_REQ_OUTSTAND),\

	SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \

	SR(DCHUBBUB_TEST_DEBUG_INDEX), \

	SR(DCHUBBUB_TEST_DEBUG_DATA)

	SR(DCHUBBUB_TEST_DEBUG_DATA),\

	SR(DCHUBBUB_SOFT_RESET)



#define HUBBUB_SR_WATERMARK_REG_LIST()\

	SR(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A),\
@@ -105,6 +106,7 @@ struct dcn_hubbub_registers { 
	uint32_t DCHUBBUB_SDPIF_AGP_BOT;

	uint32_t DCHUBBUB_SDPIF_AGP_TOP;

	uint32_t DCHUBBUB_CRC_CTRL;

	uint32_t DCHUBBUB_SOFT_RESET;

};



/* set field name */
@@ -114,6 +116,7 @@ struct dcn_hubbub_registers { 


#define HUBBUB_MASK_SH_LIST_DCN(mask_sh)\

		HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \

		HUBBUB_SF(DCHUBBUB_SOFT_RESET, DCHUBBUB_GLOBAL_SOFT_RESET, mask_sh), \

		HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST, mask_sh), \

		HUBBUB_SF(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL, DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE, mask_sh), \

		HUBBUB_SF(DCHUBBUB_ARB_DRAM_STATE_CNTL, DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE, mask_sh), \
@@ -143,6 +146,7 @@ struct dcn_hubbub_registers { 
		type DCHUBBUB_ARB_SAT_LEVEL;\

		type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\

		type DCHUBBUB_GLOBAL_TIMER_REFDIV;\

		type DCHUBBUB_GLOBAL_SOFT_RESET; \

		type SDPIF_FB_TOP;\

		type SDPIF_FB_BASE;\

		type SDPIF_FB_OFFSET;\
@@ -201,6 +205,7 @@ void hubbub1_toggle_watermark_change_req( 
void hubbub1_wm_read_state(struct hubbub *hubbub,

		struct dcn_hubbub_wm *wm);



void hubbub1_soft_reset(struct hubbub *hubbub, bool reset);

void hubbub1_construct(struct hubbub *hubbub,

	struct dc_context *ctx,

	const struct dcn_hubbub_registers *hubbub_regs,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c

+24 −0
Original line number Diff line number Diff line
@@ -78,6 +78,27 @@ static void hubp1_disconnect(struct hubp *hubp) 
			CURSOR_ENABLE, 0);

}



static void hubp1_disable_control(struct hubp *hubp, bool disable_hubp)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);

	uint32_t disable = disable_hubp ? 1 : 0;



	REG_UPDATE(DCHUBP_CNTL,

			HUBP_DISABLE, disable);

}



static unsigned int hubp1_get_underflow_status(struct hubp *hubp)

{

	uint32_t hubp_underflow = 0;

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);



	REG_GET(DCHUBP_CNTL,

		HUBP_UNDERFLOW_STATUS,

		&hubp_underflow);



	return hubp_underflow;

}



static void hubp1_set_hubp_blank_en(struct hubp *hubp, bool blank)

{

	struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
@@ -1117,6 +1138,9 @@ static struct hubp_funcs dcn10_hubp_funcs = { 
	.hubp_clk_cntl = hubp1_clk_cntl,

	.hubp_vtg_sel = hubp1_vtg_sel,

	.hubp_read_state = hubp1_read_state,

	.hubp_disable_control =  hubp1_disable_control,

	.hubp_get_underflow_status = hubp1_get_underflow_status,



};



/*****************************************/

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h

+3 −0
Original line number Diff line number Diff line
@@ -253,6 +253,7 @@ 
	HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_UNDERFLOW_STATUS, mask_sh),\

	HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, mask_sh),\

	HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_VTG_SEL, mask_sh),\

	HUBP_SF(HUBP0_DCHUBP_CNTL, HUBP_DISABLE, mask_sh),\

	HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_PIPES, mask_sh),\

	HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, NUM_BANKS, mask_sh),\

	HUBP_SF(HUBP0_DCSURF_ADDR_CONFIG, PIPE_INTERLEAVE, mask_sh),\
@@ -421,6 +422,7 @@ 


#define DCN_HUBP_REG_FIELD_LIST(type) \

	type HUBP_BLANK_EN;\

	type HUBP_DISABLE;\

	type HUBP_TTU_DISABLE;\

	type HUBP_NO_OUTSTANDING_REQ;\

	type HUBP_VTG_SEL;\
@@ -723,4 +725,5 @@ void hubp1_read_state(struct hubp *hubp); 


enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch);





#endif