Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 39205750 authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Oceton: Fix build error. 



If CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB, CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION,
CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT and
CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT are all undefined:

arch/mips/cavium-octeon/setup.c: In function ‘prom_init’:
arch/mips/cavium-octeon/setup.c:715:12: error: unused variable ‘ebase’ [-Werror=unused-variable]

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent c8d5c685

arch/mips/cavium-octeon/setup.c

+2 −1
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
 * Copyright (C) 2008, 2009 Wind River Systems

 *   written by Ralf Baechle <ralf@linux-mips.org>

 */

#include <linux/compiler.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/console.h>
@@ -712,7 +713,7 @@ void __init prom_init(void) 
	if (cvmx_read_csr(CVMX_L2D_FUS3) & (3ull << 34)) {

		pr_info("Skipping L2 locking due to reduced L2 cache size\n");

	} else {

		uint32_t ebase = read_c0_ebase() & 0x3ffff000;

		uint32_t __maybe_unused ebase = read_c0_ebase() & 0x3ffff000;

#ifdef CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB

		/* TLB refill */

		cvmx_l2c_lock_mem_region(ebase, 0x100);