Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 390ddc19 authored by Nishanth Menon's avatar Nishanth Menon
Browse files

ARM: OMAP4: PRM: use the generic prm_inst to allow logic to be abstracted



use the generic function to pick up the prm_instance for a generic logic
which can be reused from OMAP4+

Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Acked-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent e3002d1a
Loading
Loading
Loading
Loading
+38 −9
Original line number Original line Diff line number Diff line
@@ -154,21 +154,36 @@ void omap4_prm_vp_clear_txdone(u8 vp_id)


u32 omap4_prm_vcvp_read(u8 offset)
u32 omap4_prm_vcvp_read(u8 offset)
{
{
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return 0;

	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
					   OMAP4430_PRM_DEVICE_INST, offset);
					   inst, offset);
}
}


void omap4_prm_vcvp_write(u32 val, u8 offset)
void omap4_prm_vcvp_write(u32 val, u8 offset)
{
{
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return;

	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
				     OMAP4430_PRM_DEVICE_INST, offset);
				     inst, offset);
}
}


u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
{
{
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return 0;

	return omap4_prminst_rmw_inst_reg_bits(mask, bits,
	return omap4_prminst_rmw_inst_reg_bits(mask, bits,
					       OMAP4430_PRM_PARTITION,
					       OMAP4430_PRM_PARTITION,
					       OMAP4430_PRM_DEVICE_INST,
					       inst,
					       offset);
					       offset);
}
}


@@ -275,14 +290,18 @@ void omap44xx_prm_restore_irqen(u32 *saved_mask)
void omap44xx_prm_reconfigure_io_chain(void)
void omap44xx_prm_reconfigure_io_chain(void)
{
{
	int i = 0;
	int i = 0;
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return;


	/* Trigger WUCLKIN enable */
	/* Trigger WUCLKIN enable */
	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
				    OMAP4430_WUCLK_CTRL_MASK,
				    OMAP4430_WUCLK_CTRL_MASK,
				    OMAP4430_PRM_DEVICE_INST,
				    inst,
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
	omap_test_timeout(
	omap_test_timeout(
		(((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
		(((omap4_prm_read_inst_reg(inst,
					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
		   OMAP4430_WUCLK_STATUS_MASK) >>
		   OMAP4430_WUCLK_STATUS_MASK) >>
		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
		  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
@@ -292,10 +311,10 @@ void omap44xx_prm_reconfigure_io_chain(void)


	/* Trigger WUCLKIN disable */
	/* Trigger WUCLKIN disable */
	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
	omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
				    OMAP4430_PRM_DEVICE_INST,
				    inst,
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
	omap_test_timeout(
	omap_test_timeout(
		(((omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
		(((omap4_prm_read_inst_reg(inst,
					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
					   OMAP4_PRM_IO_PMCTRL_OFFSET) &
		   OMAP4430_WUCLK_STATUS_MASK) >>
		   OMAP4430_WUCLK_STATUS_MASK) >>
		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
		  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
@@ -316,9 +335,14 @@ void omap44xx_prm_reconfigure_io_chain(void)
 */
 */
static void __init omap44xx_prm_enable_io_wakeup(void)
static void __init omap44xx_prm_enable_io_wakeup(void)
{
{
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return;

	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
	omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
				    OMAP4430_GLOBAL_WUEN_MASK,
				    OMAP4430_GLOBAL_WUEN_MASK,
				    OMAP4430_PRM_DEVICE_INST,
				    inst,
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
				    OMAP4_PRM_IO_PMCTRL_OFFSET);
}
}


@@ -333,8 +357,13 @@ static u32 omap44xx_prm_read_reset_sources(void)
	struct prm_reset_src_map *p;
	struct prm_reset_src_map *p;
	u32 r = 0;
	u32 r = 0;
	u32 v;
	u32 v;
	s32 inst = omap4_prmst_get_prm_dev_inst();

	if (inst == PRM_INSTANCE_UNKNOWN)
		return 0;



	v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
	v = omap4_prm_read_inst_reg(inst,
				    OMAP4_RM_RSTST);
				    OMAP4_RM_RSTST);


	p = omap44xx_prm_reset_src_map;
	p = omap44xx_prm_reset_src_map;