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Commit 380bbced authored by Sahil Chandna's avatar Sahil Chandna Committed by Guru Das Srinagesh
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power: smb5: Configure CC threshold Voltage to 1.6 V 



Based on hardware recommendation, set CC threshold voltage
to be 1.6 V for SRC mode.

Change-Id: I9fb324b9901b8f870ffb90abca99071a9c8d4c44
Signed-off-by: default avatarSahil Chandna <chandna@codeaurora.org>
parent e434a84a

drivers/power/supply/qcom/qpnp-smb5.c

+10 −1
Original line number Diff line number Diff line
@@ -1900,9 +1900,18 @@ static int smb5_configure_typec(struct smb_charger *chg) 
	rc = smblib_masked_write(chg, USBIN_LOAD_CFG_REG,

		USBIN_IN_COLLAPSE_GF_SEL_MASK | USBIN_AICL_STEP_TIMING_SEL_MASK,

		0);

	if (rc < 0)

	if (rc < 0) {

		dev_err(chg->dev,

			"Couldn't set USBIN_LOAD_CFG_REG rc=%d\n", rc);

		return rc;

	}



	/* Set CC threshold to 1.6 V in source mode */

	rc = smblib_masked_write(chg, TYPE_C_EXIT_STATE_CFG_REG,

				SEL_SRC_UPPER_REF_BIT, SEL_SRC_UPPER_REF_BIT);

	if (rc < 0)

		dev_err(chg->dev,

			"Couldn't configure CC threshold voltage rc=%d\n", rc);



	return rc;

}

drivers/power/supply/qcom/smb5-reg.h

+1 −0
Original line number Diff line number Diff line
@@ -391,6 +391,7 @@ enum { 


#define TYPE_C_EXIT_STATE_CFG_REG		(TYPEC_BASE + 0x50)

#define BYPASS_VSAFE0V_DURING_ROLE_SWAP_BIT	BIT(3)

#define SEL_SRC_UPPER_REF_BIT			BIT(2)

#define EXIT_SNK_BASED_ON_CC_BIT		BIT(0)



#define TYPE_C_CURRSRC_CFG_REG			(TYPEC_BASE + 0x52)