Merge "usb: phy: Do not perform phy reset if EUD is enabled" (37f3d2ab) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/usb/phy/phy-msm-qusb.c

+21 −0

Original line number	Diff line number	Diff line
		@@ -99,6 +99,7 @@ struct qusb_phy {
		void __iomem *ref_clk_base;
		void __iomem *tcsr_clamp_dig_n;
		void __iomem *tcsr_conn_box_spare;
		void __iomem *eud_enable_reg;

		struct clk *ref_clk_src;
		struct clk *ref_clk;
		@@ -404,6 +405,11 @@ static int qusb_phy_init(struct usb_phy *phy)

		dev_dbg(phy->dev, "%s\n", __func__);

		if (qphy->eud_enable_reg && readl_relaxed(qphy->eud_enable_reg)) {
		dev_err(qphy->phy.dev, "eud is enabled\n");
		return 0;
		}

		/*
		* ref clock is enabled by default after power on reset. Linux clock
		* driver will disable this clock as part of late init if peripheral
		@@ -717,6 +723,11 @@ static int qusb_phy_dpdm_regulator_enable(struct regulator_dev *rdev)
		dev_dbg(qphy->phy.dev, "%s dpdm_enable:%d\n",
		__func__, qphy->dpdm_enable);

		if (qphy->eud_enable_reg && readl_relaxed(qphy->eud_enable_reg)) {
		dev_err(qphy->phy.dev, "eud is enabled\n");
		return 0;
		}

		mutex_lock(&qphy->phy_lock);
		if (!qphy->dpdm_enable) {
		ret = qusb_phy_enable_power(qphy, true);
		@@ -903,6 +914,16 @@ static int qusb_phy_probe(struct platform_device *pdev)
		}
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"eud_enable_reg");
		if (res) {
		qphy->eud_enable_reg = devm_ioremap_resource(dev, res);
		if (IS_ERR(qphy->eud_enable_reg)) {
		dev_err(dev, "err getting eud_enable_reg address\n");
		return PTR_ERR(qphy->eud_enable_reg);
		}
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"ref_clk_addr");
		if (res) {