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Commit 37dc39b4 authored by Phanindra Babu Pabba's avatar Phanindra Babu Pabba
Browse files

ARM: dts: msm: Add qseecom device and qseecom heap for bengal 

Add qseecom device and qseecom heap setting into device tree
to enable qseecom.Also updated TZ app memory region's address
and size.

Change-Id: Ifa28fff030d76bfd556e26f4f16c530aa4aa2622
parent 22bbf2f3

qcom/bengal-ion.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -28,5 +28,23 @@ 
				token = <0x20000000>;

			};

		};



		qcom,ion-heap@26 { /* USER CONTIG HEAP */

			reg = <26>;

			memory-region = <&user_contig_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@27 { /* QSEECOM HEAP */

			reg = <27>;

			memory-region = <&qseecom_mem>;

			qcom,ion-heap-type = "DMA";

		};



		qcom,ion-heap@19 { /* QSEECOM HEAP */

			reg = <19>;

			memory-region = <&qseecom_ta_mem>;

			qcom,ion-heap-type = "DMA";

		};

	};

};

qcom/bengal.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -364,6 +364,30 @@ 
			reg = <0x0 0x55215000 0x0 0x2000>;

		};



		user_contig_mem: user_contig_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1000000>;

		};



		qseecom_mem: qseecom_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1400000>;

		};



		qseecom_ta_mem: qseecom_ta_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;

			reusable;

			alignment = <0x0 0x400000>;

			size = <0x0 0x1000000>;

		};



		cdsp_sec_mem: cdsp_sec_regions@5f800000 {

			compatible = "removed-dma-pool";

			no-map;
@@ -717,6 +741,43 @@ 
		reg-names = "pshold-base", "tcsr-boot-misc-detect";

	};



	qcom_seecom: qseecom@47900000 {

		compatible = "qcom,qseecom";

		reg = <0x47900000 0x2200000>;

		reg-names = "secapp-region";

		memory-region = <&qseecom_mem>;

		qcom,hlos-num-ce-hw-instances = <1>;

		qcom,hlos-ce-hw-instance = <0>;

		qcom,qsee-ce-hw-instance = <0>;

		qcom,disk-encrypt-pipe-pair = <2>;

		qcom,support-fde;

		qcom,fde-key-size;

		qcom,appsbl-qseecom-support;

		qcom,commonlib64-loaded-by-uefi;

		qcom,msm-bus,name = "qseecom-noc";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 0 0>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 200000 400000>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 300000 800000>,

			<MSM_BUS_MASTER_CRYPTO_CORE0

			MSM_BUS_SLAVE_FIRST 400000 1000000>;

		clock-names =

			"core_clk_src", "core_clk",

			"iface_clk", "bus_clk";

		clocks =

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>,

			<&rpmcc QSEECOM_CE1_CLK>;

		qcom,ce-opp-freq = <192000000>;

		qcom,qsee-reentrancy-support = <2>;

	};



	qcom,mpm2-sleep-counter@4403000 {

		compatible = "qcom,mpm2-sleep-counter";

		reg = <0x4403000 0x1000>;