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Commit 3755cc45 authored by Can Guo's avatar Can Guo
Browse files

phy: ufs: add support to control the pull down in Tx driver 



Per new PHY design, the Tx driver pull down should be enabled before analog
collapse and disabled after analog power is restored. For other PHYs
without the Tx driver pull down, this change has no impact.

Change-Id: I0ceb3fd7a0ac6b931862768448c921a76e32db24
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
parent 5294afaf

drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4.c

+30 −0
Original line number Diff line number Diff line
@@ -84,6 +84,34 @@ static int ufs_qcom_phy_qmp_v4_exit(struct phy *generic_phy) 
	return 0;

}



static inline

void ufs_qcom_phy_qmp_v4_tx_pull_down_ctrl(struct ufs_qcom_phy *phy,

						bool enable)

{

	u32 temp;



	temp = readl_relaxed(phy->mmio + QSERDES_RX0_RX_INTERFACE_MODE);

	if (enable)

		temp |= QSERDES_RX_INTERFACE_MODE_CLOCK_EDGE_BIT;

	else

		temp &= ~QSERDES_RX_INTERFACE_MODE_CLOCK_EDGE_BIT;

	writel_relaxed(temp, phy->mmio + QSERDES_RX0_RX_INTERFACE_MODE);



	if (phy->lanes_per_direction == 1)

		goto out;



	temp = readl_relaxed(phy->mmio + QSERDES_RX1_RX_INTERFACE_MODE);

	if (enable)

		temp |= QSERDES_RX_INTERFACE_MODE_CLOCK_EDGE_BIT;

	else

		temp &= ~QSERDES_RX_INTERFACE_MODE_CLOCK_EDGE_BIT;

	writel_relaxed(temp, phy->mmio + QSERDES_RX1_RX_INTERFACE_MODE);



out:

	/* ensure register value is committed */

	mb();

}



static

void ufs_qcom_phy_qmp_v4_power_control(struct ufs_qcom_phy *phy,

					 bool power_ctrl)
@@ -96,7 +124,9 @@ void ufs_qcom_phy_qmp_v4_power_control(struct ufs_qcom_phy *phy, 
		 * powered OFF.

		 */

		mb();

		ufs_qcom_phy_qmp_v4_tx_pull_down_ctrl(phy, true);

	} else {

		ufs_qcom_phy_qmp_v4_tx_pull_down_ctrl(phy, false);

		/* bring PHY out of analog power collapse */

		writel_relaxed(0x1, phy->mmio + UFS_PHY_POWER_DOWN_CONTROL);

drivers/phy/qualcomm/phy-qcom-ufs-qmp-v4.h

+3 −0
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ 
#define QSERDES_RX0_AC_JTAG_ENABLE			RX_OFF(0, 0x68)

#define QSERDES_RX0_UCDR_FO_GAIN			RX_OFF(0, 0x08)

#define QSERDES_RX0_UCDR_SO_GAIN			RX_OFF(0, 0x14)

#define QSERDES_RX0_RX_INTERFACE_MODE			RX_OFF(0, 0x134)



#define QSERDES_RX1_SIGDET_LVL				RX_OFF(1, 0x120)

#define QSERDES_RX1_SIGDET_CNTRL			RX_OFF(1, 0x11C)
@@ -175,8 +176,10 @@ 
#define QSERDES_RX1_AC_JTAG_ENABLE			RX_OFF(1, 0x68)

#define QSERDES_RX1_UCDR_FO_GAIN			RX_OFF(1, 0x08)

#define QSERDES_RX1_UCDR_SO_GAIN			RX_OFF(1, 0x14)

#define QSERDES_RX1_RX_INTERFACE_MODE			RX_OFF(1, 0x134)



#define UFS_PHY_RX_LINECFG_DISABLE_BIT		BIT(1)

#define QSERDES_RX_INTERFACE_MODE_CLOCK_EDGE_BIT	BIT(5)



/*

 * This structure represents the v4 specific phy.