Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 36fffd6a authored by Florian Fainelli's avatar Florian Fainelli Committed by Tejun Heo
Browse files

ata: ahci_brcm: Avoid clobbering SATA_TOP_CTRL_BUS_CTRL 



We are doing a blind write to SATA_TOP_CTRL_BUS_CTRL to set the system
endian, but in doing so, we are also overwriting other bits, such as the
SATA_SCB_BURST_SIZE and SATA_FIFO_SIZE bits, which impact performance.
Do a read/modify/write so we keep the default values.

While we are at it, we also greatly simplify the logic and just leave
the NSP specific bit settings, instead of having a completely different
sequence.

Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent ebb82e3c

drivers/ata/ahci_brcm.c

+15 −10
Original line number Diff line number Diff line
@@ -70,6 +70,13 @@ 
	(DATA_ENDIAN << DMADESC_ENDIAN_SHIFT) |		\

	(MMIO_ENDIAN << MMIO_ENDIAN_SHIFT))



#define BUS_CTRL_ENDIAN_NSP_CONF			\

	(0x02 << DMADATA_ENDIAN_SHIFT | 0x02 << DMADESC_ENDIAN_SHIFT)



#define BUS_CTRL_ENDIAN_CONF_MASK			\

	(0x3 << MMIO_ENDIAN_SHIFT | 0x3 << DMADESC_ENDIAN_SHIFT |	\

	 0x3 << DMADATA_ENDIAN_SHIFT | 0x3 << PIODATA_ENDIAN_SHIFT)



enum brcm_ahci_version {

	BRCM_SATA_BCM7425 = 1,

	BRCM_SATA_BCM7445,
@@ -250,18 +257,16 @@ static u32 brcm_ahci_get_portmask(struct platform_device *pdev, 
static void brcm_sata_init(struct brcm_ahci_priv *priv)

{

	void __iomem *ctrl = priv->top_ctrl + SATA_TOP_CTRL_BUS_CTRL;

	u32 data;



	/* Configure endianness */

	if (priv->version ==  BRCM_SATA_NSP) {

		u32 data = brcm_sata_readreg(ctrl);



		data &= ~((0x03 << DMADATA_ENDIAN_SHIFT) |

			(0x03 << DMADESC_ENDIAN_SHIFT));

		data |= (0x02 << DMADATA_ENDIAN_SHIFT) |

			(0x02 << DMADESC_ENDIAN_SHIFT);

	data = brcm_sata_readreg(ctrl);

	data &= ~BUS_CTRL_ENDIAN_CONF_MASK;

	if (priv->version == BRCM_SATA_NSP)

		data |= BUS_CTRL_ENDIAN_NSP_CONF;

	else

		data |= BUS_CTRL_ENDIAN_CONF;

	brcm_sata_writereg(data, ctrl);

	} else

		brcm_sata_writereg(BUS_CTRL_ENDIAN_CONF, ctrl);

}



#ifdef CONFIG_PM_SLEEP