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Commit 360454fe authored by Karthik Anantha Ram's avatar Karthik Anantha Ram Committed by Mukund Madhusudan Atre
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msm: camera: icp: Avoid accessing frame process data in the kernel 



IPE/BPS frame process data keeps changing one needs to update the
kernel hfi header accordingly everytime. This change avoids
accessing those structs in the kernel. Userspace will ensure
resetting the struct to a default value.

Change-Id: If224befa89643f44997bb6e826f8dfcfac5d08d1
Signed-off-by: default avatarKarthik Anantha Ram <kartanan@codeaurora.org>
Signed-off-by: default avatarMukund Madhusudan Atre <matre@codeaurora.org>
parent 519d453d

drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c

+1 −48
Original line number Diff line number Diff line
@@ -3836,16 +3836,12 @@ static int cam_icp_mgr_process_cmd_desc(struct cam_icp_hw_mgr *hw_mgr, 
	uint32_t *fw_cmd_buf_iova_addr)

{

	int rc = 0;

	int i, j, k;

	int i;

	int num_cmd_buf = 0;

	uint64_t addr;

	size_t len;

	struct cam_cmd_buf_desc *cmd_desc = NULL;

	uintptr_t cpu_addr = 0;

	struct ipe_frame_process_data *frame_process_data = NULL;

	struct bps_frame_process_data *bps_frame_process_data = NULL;

	struct frame_set *ipe_set = NULL;

	struct frame_buffer *bps_bufs = NULL;



	cmd_desc = (struct cam_cmd_buf_desc *)

		((uint32_t *) &packet->payload + packet->cmd_buf_offset/4);
@@ -3893,49 +3889,6 @@ static int cam_icp_mgr_process_cmd_desc(struct cam_icp_hw_mgr *hw_mgr, 
		return -EINVAL;

	}



	if (ctx_data->icp_dev_acquire_info->dev_type !=

		CAM_ICP_RES_TYPE_BPS) {

		CAM_DBG(CAM_ICP, "cpu addr = %zx", cpu_addr);

		frame_process_data = (struct ipe_frame_process_data *)cpu_addr;

		CAM_DBG(CAM_ICP, "%u %u %u", frame_process_data->max_num_cores,

			frame_process_data->target_time,

			frame_process_data->frames_in_batch);

		frame_process_data->strip_lib_out_addr = 0;

		frame_process_data->iq_settings_addr = 0;

		frame_process_data->scratch_buffer_addr = 0;

		frame_process_data->ubwc_stats_buffer_addr = 0;

		frame_process_data->cdm_buffer_addr = 0;

		frame_process_data->cdm_prog_base = 0;

		for (i = 0; i < frame_process_data->frames_in_batch; i++) {

			ipe_set = &frame_process_data->framesets[i];

			for (j = 0; j < IPE_IO_IMAGES_MAX; j++) {

				for (k = 0; k < MAX_NUM_OF_IMAGE_PLANES; k++) {

					ipe_set->buffers[j].buf_ptr[k] = 0;

					ipe_set->buffers[j].meta_buf_ptr[k] = 0;

				}

			}

		}

	} else {

		CAM_DBG(CAM_ICP, "cpu addr = %zx", cpu_addr);

		bps_frame_process_data =

			(struct bps_frame_process_data *)cpu_addr;

		CAM_DBG(CAM_ICP, "%u %u",

			bps_frame_process_data->max_num_cores,

			bps_frame_process_data->target_time);

		bps_frame_process_data->ubwc_stats_buffer_addr = 0;

		bps_frame_process_data->cdm_buffer_addr = 0;

		bps_frame_process_data->iq_settings_addr = 0;

		bps_frame_process_data->strip_lib_out_addr = 0;

		bps_frame_process_data->cdm_prog_addr = 0;

		for (i = 0; i < BPS_IO_IMAGES_MAX; i++) {

			bps_bufs = &bps_frame_process_data->buffers[i];

			for (j = 0; j < MAX_NUM_OF_IMAGE_PLANES; j++) {

				bps_bufs->buf_ptr[j] = 0;

				bps_bufs->meta_buf_ptr[j] = 0;

			}

		}

	}



	return rc;

}