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Commit 35874599 authored by Vaibhav Agrawal's avatar Vaibhav Agrawal Committed by Jiten Patel
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Set the default slot for Full Disk Encryption key to 31 



QSEECOM sets the Full Disk Encryption(FDE) key into
slot 0 by default, but for File Based Encryption(FBE)
device where Metadata Encryption(ME) is enabled, slot zero
is already used. So, an ioctl for setting FDE key into
Inline Crypto Engine(ICE) when called on device with ME
enabled, would overwrite the key set for ME, and hence
would lead to failure during reboot. Hence, set the slot
value of FDE key as 31 which is the last slot supported.
Use the same slot during read/write operations as well.

Tests: 1. Device bootup for sdm660 target with FDE enabled
       2. OTA update of kernel images with fix included.

Change-Id: Id77c4e55ce5740fd8babdfa690d3c39d39258f6e
Signed-off-by: default avatarVaibhav Agrawal <vagrawa@codeaurora.org>
parent 52a62235

drivers/crypto/msm/ice.c

+8 −1
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
/*

 * QTI Inline Crypto Engine (ICE) driver

 *

 * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.

 * Copyright (c) 2014-2020, 2021 The Linux Foundation. All rights reserved.

 */



#include <linux/module.h>
@@ -60,6 +60,8 @@ 
#define ICE_CRYPTO_CXT_FBE 2

#define ICE_INSTANCE_TYPE_LENGTH 12



#define ICE_FDE_KEY_INDEX 31



static int ice_fde_flag;



struct ice_clk_info {
@@ -104,6 +106,11 @@ static int qti_ice_setting_config(struct request *req, 
			setting->encr_bypass = true;

			setting->decr_bypass = true;

		}

		/* Qseecom now sets the FDE key to slot 31 by default, instead

		 * of slot 0, so use the same slot here during read/write

		 */

		if (cxt == ICE_CRYPTO_CXT_FDE)

			setting->crypto_data.key_index = ICE_FDE_KEY_INDEX;

	}



	return 0;

drivers/misc/qseecom.c

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ 
#define TWO 2

#define QSEECOM_UFS_ICE_CE_NUM 10

#define QSEECOM_SDCC_ICE_CE_NUM 20

#define QSEECOM_ICE_FDE_KEY_INDEX 0

#define QSEECOM_ICE_FDE_KEY_INDEX 31



#define PHY_ADDR_4G	(1ULL<<32)