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Commit 356ca6ce authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth
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devicetree: bindings: update MVEBU pinctrl binding documentation 



Dove pinctrl binding now requires three different reg properties. This
updates corresponding binding and example accordingly. While at it, also
document reg property as required for the other MVEBU SoC pinctrl nodes.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
parent 25eeefbf

Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt

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@@ -5,6 +5,7 @@ part and usage. 




Required properties:

Required properties:

- compatible: "marvell,88f6710-pinctrl"

- compatible: "marvell,88f6710-pinctrl"

- reg: register specifier of MPP registers





Available mpp pins/groups and functions:

Available mpp pins/groups and functions:

Note: brackets (x) are not part of the mpp name for marvell,function and given

Note: brackets (x) are not part of the mpp name for marvell,function and given

Documentation/devicetree/bindings/pinctrl/marvell,armada-xp-pinctrl.txt

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@@ -6,6 +6,7 @@ part and usage. 
Required properties:

Required properties:

- compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",

- compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",

              "marvell,mv78460-pinctrl"

              "marvell,mv78460-pinctrl"

- reg: register specifier of MPP registers





This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.

This driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460.

Documentation/devicetree/bindings/pinctrl/marvell,dove-pinctrl.txt

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Original line number Original line Diff line number Diff line
@@ -6,6 +6,7 @@ part and usage. 
Required properties:

Required properties:

- compatible: "marvell,dove-pinctrl"

- compatible: "marvell,dove-pinctrl"

- clocks: (optional) phandle of pdma clock

- clocks: (optional) phandle of pdma clock

- reg: register specifiers of MPP, MPP4, and PMU MPP registers





Available mpp pins/groups and functions:

Available mpp pins/groups and functions:

Note: brackets (x) are not part of the mpp name for marvell,function and given

Note: brackets (x) are not part of the mpp name for marvell,function and given

Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt

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@@ -8,6 +8,7 @@ Required properties: 
              "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",

              "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl",

              "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"

              "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl"

              "marvell,98dx4122-pinctrl"

              "marvell,98dx4122-pinctrl"

- reg: register specifier of MPP registers





This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.

This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x.

It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.

It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs.

Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt

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@@ -37,7 +37,7 @@ uart1: serial@12100 { 




pinctrl: pinctrl@d0200 {

pinctrl: pinctrl@d0200 {

	compatible = "marvell,dove-pinctrl";

	compatible = "marvell,dove-pinctrl";

	reg = <0xd0200 0x20>;

	reg = <0xd0200 0x14>, <0xd0440 0x04>, <0xd802c 0x08>;





	pmx_uart1_sw: pmx-uart1-sw {

	pmx_uart1_sw: pmx-uart1-sw {

		marvell,pins = "mpp_uart1";

		marvell,pins = "mpp_uart1";