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Commit 35399dda authored by Andrew Bresticker's avatar Andrew Bresticker Committed by Tomasz Figa
Browse files

clk: exynos5250: add clock ID for div_pcm0 



There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0.  Add a clock ID for it so that
we can reference it in device trees.

Signed-off-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Reviewed-by: default avatarTomasz Figa <t.figa@samsung.com>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
parent 547f3350

Documentation/devicetree/bindings/clock/exynos5250-clock.txt

+1 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ clock which they consume. 
  div_i2s1		157

  div_i2s2		158

  sclk_hdmiphy		159

  div_pcm0		160





   [Peripheral Clock Gates]

drivers/clk/samsung/clk-exynos5250.c

+1 −1
Original line number Diff line number Diff line
@@ -329,7 +329,7 @@ static struct samsung_div_clock exynos5250_div_clks[] __initdata = { 
	DIV(0, "div_jpeg", "mout_jpeg", DIV_GEN, 4, 4),



	DIV(0, "div_audio0", "mout_audio0", DIV_MAU, 0, 4),

	DIV(0, "div_pcm0", "sclk_audio0", DIV_MAU, 4, 8),

	DIV(CLK_DIV_PCM0, "div_pcm0", "sclk_audio0", DIV_MAU, 4, 8),



	DIV(0, "div_sata", "mout_sata", DIV_FSYS0, 20, 4),

	DIV(0, "div_usb3", "mout_usb3", DIV_FSYS0, 24, 4),

include/dt-bindings/clock/exynos5250.h

+1 −0
Original line number Diff line number Diff line
@@ -55,6 +55,7 @@ 
#define CLK_DIV_I2S1		157

#define CLK_DIV_I2S2		158

#define CLK_SCLK_HDMIPHY	159

#define CLK_DIV_PCM0		160



/* gate clocks */

#define CLK_GSCL0		256