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Commit 34ea4b4a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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ARM: dts: r8a7794: Fix W=1 dtc warnings 



Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property

Move the cache-controller node under the cpus node, and make its unit
name and reg property match the MPIDR value.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent ad53f5f0

arch/arm/boot/dts/r8a7794.dtsi

+7 −6
Original line number Diff line number Diff line
@@ -55,14 +55,15 @@ 
			power-domains = <&sysc R8A7794_PD_CA7_CPU1>;

			next-level-cache = <&L2_CA7>;

		};

	};



	L2_CA7: cache-controller@1 {

		L2_CA7: cache-controller@0 {

			compatible = "cache";

			reg = <0>;

			power-domains = <&sysc R8A7794_PD_CA7_SCU>;

			cache-unified;

			cache-level = <2>;

		};

	};



	gic: interrupt-controller@f1001000 {

		compatible = "arm,gic-400";