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Commit 34947b8a authored by Sylwester Nawrocki's avatar Sylwester Nawrocki Committed by Mauro Carvalho Chehab
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[media] exynos4-is: Add the FIMC-IS ISP capture DMA driver



Add a video capture node for the FIMC-IS ISP IP block. The Exynos4x12
FIMC-IS ISP IP block has 2 DMA interfaces that allow to capture raw
Bayer and YUV data to memory.  Currently only the DMA2 output is and
raw Bayer data capture is supported.

Signed-off-by: default avatarSylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent fa91f105
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+9 −0
Original line number Diff line number Diff line
@@ -64,4 +64,13 @@ config VIDEO_EXYNOS4_FIMC_IS
	  To compile this driver as a module, choose M here: the
	  module will be called exynos4-fimc-is.

config VIDEO_EXYNOS4_ISP_DMA_CAPTURE
	bool "EXYNOS4x12 FIMC-IS ISP Direct DMA capture support"
	depends on VIDEO_EXYNOS4_FIMC_IS
	select VIDEO_EXYNOS4_IS_COMMON
	default y
	  help
	  This option enables an additional video device node exposing a V4L2
	  video capture interface for the FIMC-IS ISP raw (Bayer) capture DMA.

endif # VIDEO_SAMSUNG_EXYNOS4_IS
+4 −0
Original line number Diff line number Diff line
@@ -6,6 +6,10 @@ exynos4-is-common-objs := common.o
exynos-fimc-is-objs := fimc-is.o fimc-isp.o fimc-is-sensor.o fimc-is-regs.o
exynos-fimc-is-objs += fimc-is-param.o fimc-is-errno.o fimc-is-i2c.o

ifeq ($(CONFIG_VIDEO_EXYNOS4_ISP_DMA_CAPTURE),y)
exynos-fimc-is-objs += fimc-isp-video.o
endif

obj-$(CONFIG_VIDEO_S5P_MIPI_CSIS)	+= s5p-csis.o
obj-$(CONFIG_VIDEO_EXYNOS_FIMC_LITE)	+= exynos-fimc-lite.o
obj-$(CONFIG_VIDEO_EXYNOS4_FIMC_IS)	+= exynos-fimc-is.o
+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static void __fimc_is_hw_update_param_sensor_framerate(struct fimc_is *is)
	__hw_param_copy(dst, src);
}

static int __fimc_is_hw_update_param(struct fimc_is *is, u32 offset)
int __fimc_is_hw_update_param(struct fimc_is *is, u32 offset)
{
	struct is_param_region *par = &is->is_p_region->parameter;
	struct chain_config *cfg = &is->config[is->config_index];
+5 −0
Original line number Diff line number Diff line
@@ -911,6 +911,10 @@ struct is_region {
	u32 shared[MAX_SHARED_COUNT];
} __packed;

/* Offset to the ISP DMA2 output buffer address array. */
#define DMA2_OUTPUT_ADDR_ARRAY_OFFS \
	(offsetof(struct is_region, shared) + 32 * sizeof(u32))

struct is_debug_frame_descriptor {
	u32 sensor_frame_time;
	u32 sensor_exposure_time;
@@ -988,6 +992,7 @@ struct sensor_open_extended {
struct fimc_is;

int fimc_is_hw_get_sensor_max_framerate(struct fimc_is *is);
int __fimc_is_hw_update_param(struct fimc_is *is, u32 offset);
void fimc_is_set_initial_params(struct fimc_is *is);
unsigned int __get_pending_param_count(struct fimc_is *is);

+14 −0
Original line number Diff line number Diff line
@@ -105,6 +105,20 @@ int fimc_is_hw_get_params(struct fimc_is *is, unsigned int num_args)
	return 0;
}

void fimc_is_hw_set_isp_buf_mask(struct fimc_is *is, unsigned int mask)
{
	if (hweight32(mask) == 1) {
		dev_err(&is->pdev->dev, "%s(): not enough buffers (mask %#x)\n",
							__func__, mask);
		return;
	}

	if (mcuctl_read(is, MCUCTL_REG_ISSR(23)) != 0)
		dev_dbg(&is->pdev->dev, "non-zero DMA buffer mask\n");

	mcuctl_write(mask, is, MCUCTL_REG_ISSR(23));
}

void fimc_is_hw_set_sensor_num(struct fimc_is *is)
{
	pr_debug("setting sensor index to: %d\n", is->sensor_index);
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