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Commit 33ff712a authored by Jayachandran C's avatar Jayachandran C Committed by Ralf Baechle
Browse files

MIPS: Netlogic: Optimize and fix write_c0_eimr() 



Remove the irq save/restore from write_c0_eimr(), as it is always called
with interrupts off.

This allows us to remove workaround in write_c0_eimr() to fix up the
flags used by local_irq_save. This fixup worked on XLR, but will break
when 32-bit support is added to r2 cpus like XLP.

Signed-off-by: default avatarJayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5022/


Acked-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 042df4fa

arch/mips/include/asm/netlogic/mips-extns.h

+5 −8
Original line number Diff line number Diff line
@@ -43,16 +43,15 @@ 
#define write_c0_eirr(val)	__write_64bit_c0_register($9, 6, val)



/*

 * Writing EIMR in 32 bit is a special case, the lower 8 bit of the

 * EIMR is shadowed in the status register, so we cannot save and

 * restore status register for split read.

 * NOTE: Do not save/restore flags around write_c0_eimr().

 * On non-R2 platforms the flags has part of EIMR that is shadowed in STATUS

 * register. Restoring flags will overwrite the lower 8 bits of EIMR.

 *

 * Call with interrupts disabled.

 */

#define write_c0_eimr(val)						\

do {									\

	if (sizeof(unsigned long) == 4) {				\

		unsigned long __flags;					\

									\

		local_irq_save(__flags);				\

		__asm__ __volatile__(					\

			".set\tmips64\n\t"				\

			"dsll\t%L0, %L0, 32\n\t"			\
@@ -62,8 +61,6 @@ do { \ 
			"dmtc0\t%L0, $9, 7\n\t"				\

			".set\tmips0"					\

			: : "r" (val));					\

		__flags = (__flags & 0xffff00ff) | (((val) & 0xff) << 8);\

		local_irq_restore(__flags);				\

	} else								\

		__write_64bit_c0_register($9, 7, (val));		\

} while (0)