Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 339e658b authored by David VomLehn's avatar David VomLehn Committed by Ralf Baechle
Browse files

MIPS: PowerTV: Correct ASIC device register names and locations 



Correct ASIC device register names and addresses for USB devices.

Signed-off-by: default avatarDavid VomLehn <dvomlehn@cisco.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1258/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent ca36c36b

arch/mips/include/asm/mach-powertv/asic_reg_map.h

+1 −1
Original line number Diff line number Diff line
@@ -64,7 +64,7 @@ REGISTER_MAP_ELEMENT(int_level_0_1) 
REGISTER_MAP_ELEMENT(int_level_0_0)

REGISTER_MAP_ELEMENT(int_docsis_en)

REGISTER_MAP_ELEMENT(mips_pll_setup)

REGISTER_MAP_ELEMENT(usb_fs)

REGISTER_MAP_ELEMENT(fs432x4b4_usb_ctl)

REGISTER_MAP_ELEMENT(test_bus)

REGISTER_MAP_ELEMENT(crt_spare)

REGISTER_MAP_ELEMENT(usb2_ohci_int_mask)

arch/mips/powertv/asic/asic-calliope.c

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ const struct register_map calliope_register_map __initdata = { 
	.int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)},



	.mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)},

	.usb_fs = {.phys = CALLIOPE_ADDR(0x980030)},

	.fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)},

	.test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)},

	.crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)},

	.usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)},

arch/mips/powertv/asic/asic-cronus.c

+2 −2
Original line number Diff line number Diff line
@@ -77,13 +77,13 @@ const struct register_map cronus_register_map __initdata = { 
	.int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)},



	.mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)},

	.usb_fs = {.phys = CRONUS_ADDR(0x1C0018)},

	.fs432x4b4_usb_ctl = {.phys = CRONUS_ADDR(0x1C0028)},

	.test_bus = {.phys = CRONUS_ADDR(0x1C00CC)},

	.crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)},

	.usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)},

	.usb2_strap = {.phys = CRONUS_ADDR(0x200014)},

	.ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)},

	.ohci_hc_revision = {.phys = CRONUS_ADDR(0x1E0000)},

	.ohci_hc_revision = {.phys = CRONUS_ADDR(0x21fc00)},

	.bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)},

	.usb2_control = {.phys = CRONUS_ADDR(0x2E004C)},

	.usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)},

arch/mips/powertv/asic/asic-zeus.c

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ const struct register_map zeus_register_map __initdata = { 
	.int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)},



	.mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)},

	.usb_fs = {.phys = ZEUS_ADDR(0x1a0018)},

	.fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)},

	.test_bus = {.phys = ZEUS_ADDR(0x1a0238)},

	.crt_spare = {.phys = ZEUS_ADDR(0x1a0090)},

	.usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)},

arch/mips/powertv/asic/asic_devices.c

+3 −3
Original line number Diff line number Diff line
@@ -180,9 +180,9 @@ static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3) 
	val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) |

		(nsb<<1) | (disable_div_by_3<<5));



	asic_write(val, usb_fs);

	asic_write(val | (en_prg<<4), usb_fs);

	asic_write(val | (en_prg<<4) | pwr, usb_fs);

	asic_write(val, fs432x4b4_usb_ctl);

	asic_write(val | (en_prg<<4), fs432x4b4_usb_ctl);

	asic_write(val | (en_prg<<4) | pwr, fs432x4b4_usb_ctl);

}



/*