Commit 32df8a30 authored Aug 21, 2019 by Alastair D'Silva Committed by Greg Kroah-Hartman Aug 29, 2019

powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB



The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.

This patch applies cleanly to v5.2, v4.19 & v4.14.

When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.

This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 0d5e34c1

arch/powerpc/kernel/misc_64.S

+2 −2

Original line number	Diff line number	Diff line
		@@ -135,7 +135,7 @@ _GLOBAL_TOC(flush_dcache_range)
		subf r8,r6,r4 /* compute length */
		add r8,r8,r5 /* ensure we get enough */
		lwz r9,DCACHEL1LOGBLOCKSIZE(r10) /* Get log-2 of dcache block size */
		srw. r8,r8,r9 /* compute line count */
		srd. r8,r8,r9 /* compute line count */
		beqlr /* nothing to do? */
		mtctr r8
		0: dcbst 0,r6
		@@ -153,7 +153,7 @@ _GLOBAL(flush_inval_dcache_range)
		subf r8,r6,r4 /* compute length */
		add r8,r8,r5 /* ensure we get enough */
		lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
		srw. r8,r8,r9 /* compute line count */
		srd. r8,r8,r9 /* compute line count */
		beqlr /* nothing to do? */
		sync
		isync