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Commit 32c15bb9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] time: Move R4000 clockevent device code to separate configurable file
  [MIPS] time: Delete dead cycles_per_jiffy, mips_timer_ack and null_timer_ack
  [MIPS] IP32: Retire use of plat_timer_setup.
  [MIPS] Jazz: Retire use of plat_timer_setup.
  [MIPS] IP27: Convert to clock_event_device.
  [MIPS] JMR3927: Convert to clock_event_device.
  [MIPS] Always do the ARC64_TWIDDLE_PC thing.
parents 53253383 42f77542

arch/mips/Kconfig

+24 −0
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ config MACH_ALCHEMY 


config BASLER_EXCITE

	bool "Basler eXcite smart camera"

	select CEVT_R4K

	select DMA_COHERENT

	select HW_HAS_PCI

	select IRQ_CPU
@@ -47,6 +48,7 @@ config BASLER_EXCITE_PROTOTYPE 


config BCM47XX

	bool "BCM47XX based boards"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select IRQ_CPU
@@ -63,6 +65,7 @@ config BCM47XX 


config MIPS_COBALT

	bool "Cobalt Server"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select I8253
@@ -80,6 +83,7 @@ config MIPS_COBALT 
config MACH_DECSTATION

	bool "DECstations"

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select NO_IOPORT

	select IRQ_CPU
@@ -111,6 +115,7 @@ config MACH_JAZZ 
	select ARC

	select ARC32

	select ARCH_MAY_HAVE_PC_FDC

	select CEVT_R4K

	select GENERIC_ISA_DMA

	select IRQ_CPU

	select I8253
@@ -130,6 +135,7 @@ config MACH_JAZZ 


config LASAT

	bool "LASAT Networks platforms"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select SYS_HAS_EARLY_PRINTK

	select HW_HAS_PCI
@@ -146,6 +152,7 @@ config LASAT 
config LEMOTE_FULONG

	bool "Lemote Fulong mini-PC"

	select ARCH_SPARSEMEM_ENABLE

	select CEVT_R4K

	select SYS_HAS_CPU_LOONGSON2

	select DMA_NONCOHERENT

	select BOOT_ELF32
@@ -170,6 +177,7 @@ config LEMOTE_FULONG 
config MIPS_ATLAS

	bool "MIPS Atlas board"

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select SYS_HAS_EARLY_PRINTK

	select IRQ_CPU
@@ -200,6 +208,7 @@ config MIPS_MALTA 
	bool "MIPS Malta board"

	select ARCH_MAY_HAVE_PC_FDC

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select GENERIC_ISA_DMA

	select IRQ_CPU
@@ -230,6 +239,7 @@ config MIPS_MALTA 


config MIPS_SEAD

	bool "MIPS SEAD board"

	select CEVT_R4K

	select IRQ_CPU

	select DMA_NONCOHERENT

	select SYS_HAS_EARLY_PRINTK
@@ -248,6 +258,7 @@ config MIPS_SEAD 


config MIPS_SIM

	bool 'MIPS simulator (MIPSsim)'

	select CEVT_R4K

	select DMA_NONCOHERENT

	select SYS_HAS_EARLY_PRINTK

	select IRQ_CPU
@@ -265,6 +276,7 @@ config MIPS_SIM 


config MARKEINS

	bool "NEC EMMA2RH Mark-eins"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select IRQ_CPU
@@ -279,6 +291,7 @@ config MARKEINS 


config MACH_VR41XX

	bool "NEC VR4100 series based machines"

	select CEVT_R4K

	select SYS_HAS_CPU_VR41XX

	select GENERIC_HARDIRQS_NO__DO_IRQ
@@ -315,6 +328,7 @@ config PMC_MSP 


config PMC_YOSEMITE

	bool "PMC-Sierra Yosemite eval board"

	select CEVT_R4K

	select DMA_COHERENT

	select HW_HAS_PCI

	select IRQ_CPU
@@ -335,6 +349,7 @@ config PMC_YOSEMITE 


config QEMU

	bool "Qemu"

	select CEVT_R4K

	select DMA_COHERENT

	select GENERIC_ISA_DMA

	select HAVE_STD_PC_SERIAL_PORT
@@ -365,6 +380,7 @@ config SGI_IP22 
	select ARC

	select ARC32

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HW_HAS_EISA

	select I8253
@@ -409,6 +425,7 @@ config SGI_IP32 
	select ARC

	select ARC32

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select IRQ_CPU
@@ -536,6 +553,7 @@ config SNI_RM 
	select ARC32 if CPU_LITTLE_ENDIAN

	select ARCH_MAY_HAVE_PC_FDC

	select BOOT_ELF32

	select CEVT_R4K

	select DMA_NONCOHERENT

	select GENERIC_ISA_DMA

	select HW_HAS_EISA
@@ -577,6 +595,7 @@ config TOSHIBA_JMR3927 


config TOSHIBA_RBTX4927

	bool "Toshiba RBTX49[23]7 board"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HAS_TXX9_SERIAL

	select HW_HAS_PCI
@@ -597,6 +616,7 @@ config TOSHIBA_RBTX4927 


config TOSHIBA_RBTX4938

	bool "Toshiba RBTX4938 board"

	select CEVT_R4K

	select DMA_NONCOHERENT

	select HAS_TXX9_SERIAL

	select HW_HAS_PCI
@@ -616,6 +636,7 @@ config TOSHIBA_RBTX4938 


config WR_PPMC

	bool "Wind River PPMC board"

	select CEVT_R4K

	select IRQ_CPU

	select BOOT_ELF32

	select DMA_NONCOHERENT
@@ -708,6 +729,9 @@ config ARCH_MAY_HAVE_PC_FDC 
config BOOT_RAW

	bool



config CEVT_R4K

	bool



config CFE

	bool

arch/mips/au1000/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -137,6 +137,7 @@ config SOC_AU1200 
config SOC_AU1X00

	bool

	select 64BIT_PHYS_ADDR

	select CEVT_R4K

	select IRQ_CPU

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_32BIT_KERNEL

arch/mips/jazz/irq.c

+4 −2
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 
 * for more details.

 *

 * Copyright (C) 1992 Linus Torvalds

 * Copyright (C) 1994 - 2001, 2003 Ralf Baechle

 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle

 */

#include <linux/clockchips.h>

#include <linux/init.h>
@@ -13,6 +13,7 @@ 
#include <linux/spinlock.h>



#include <asm/irq_cpu.h>

#include <asm/i8253.h>

#include <asm/i8259.h>

#include <asm/io.h>

#include <asm/jazz.h>
@@ -136,7 +137,7 @@ static struct irqaction r4030_timer_irqaction = { 
	.name		= "timer",

};



void __init plat_timer_setup(struct irqaction *ignored)

void __init plat_time_init(void)

{

	struct irqaction *irq = &r4030_timer_irqaction;
@@ -152,4 +153,5 @@ void __init plat_timer_setup(struct irqaction *ignored) 
	setup_irq(JAZZ_TIMER_IRQ, irq);



	clockevents_register_device(&r4030_clockevent);

	setup_pit_timer();

}

arch/mips/jazz/setup.c

+1 −7
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 
 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle

 * Copyright (C) 1996, 1997, 1998, 2001, 07 by Ralf Baechle

 * Copyright (C) 2001 MIPS Technologies, Inc.

 * Copyright (C) 2007 by Thomas Bogendoerfer

 */
@@ -25,7 +25,6 @@ 
#include <linux/serial_8250.h>



#include <asm/bootinfo.h>

#include <asm/i8253.h>

#include <asm/irq.h>

#include <asm/jazz.h>

#include <asm/jazzdma.h>
@@ -64,11 +63,6 @@ static struct resource jazz_io_resources[] = { 
	}

};



void __init plat_time_init(void)

{

	setup_pit_timer();

}



void __init plat_mem_setup(void)

{

	int i;

arch/mips/jmr3927/rbhma3100/setup.c

+47 −19
Original line number Diff line number Diff line 
/***********************************************************************

 *

 * Copyright 2001 MontaVista Software Inc.

 * Author: MontaVista Software, Inc.

 *              ahennessy@mvista.com

 *

 * Based on arch/mips/ddb5xxx/ddb5477/setup.c

 *

 *     Setup file for JMR3927.

 *

 * Copyright (C) 2000-2001 Toshiba Corporation

 *

/*

 *  This program is free software; you can redistribute  it and/or modify it

 *  under  the terms of  the GNU General  Public License as published by the

 *  Free Software Foundation;  either version 2 of the  License, or (at your
@@ -30,9 +19,15 @@ 
 *  with this program; if not, write  to the Free Software Foundation, Inc.,

 *  675 Mass Ave, Cambridge, MA 02139, USA.

 *

 ***********************************************************************

 * Copyright 2001 MontaVista Software Inc.

 * Author: MontaVista Software, Inc.

 *              ahennessy@mvista.com

 *

 * Copyright (C) 2000-2001 Toshiba Corporation

 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)

 */



#include <linux/clockchips.h>

#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/kdev_t.h>
@@ -104,27 +99,60 @@ static cycle_t jmr3927_hpt_read(void) 
	return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;

}



static void jmr3927_timer_ack(void)

static void jmr3927_set_mode(enum clock_event_mode mode,

	struct clock_event_device *evt)

{

	/* Nothing to do here */

}



struct clock_event_device jmr3927_clock_event_device = {

	.name		= "MIPS",

	.features	= CLOCK_EVT_FEAT_PERIODIC,

	.shift		= 32,

	.rating		= 300,

	.cpumask	= CPU_MASK_CPU0,

	.irq		= JMR3927_IRQ_TICK,

	.set_mode	= jmr3927_set_mode,

};



static irqreturn_t jmr3927_timer_interrupt(int irq, void *dev_id)

{

	struct clock_event_device *cd = &jmr3927_clock_event_device;



	jmr3927_tmrptr->tisr = 0;       /* ack interrupt */



	cd->event_handler(cd);



	return IRQ_HANDLED;

}



static struct irqaction jmr3927_timer_irqaction = {

	.handler	= jmr3927_timer_interrupt,

	.flags		= IRQF_DISABLED | IRQF_PERCPU,

	.name		= "jmr3927-timer",

};



void __init plat_time_init(void)

{

	struct clock_event_device *cd;



	clocksource_mips.read = jmr3927_hpt_read;

	mips_timer_ack = jmr3927_timer_ack;

	mips_hpt_frequency = JMR3927_TIMER_CLK;

}



void __init plat_timer_setup(struct irqaction *irq)

{

	jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ;

	jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE;

	jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD;

	jmr3927_tmrptr->tcr =

		TXx927_TMTCR_TCE | TXx927_TMTCR_CCDE | TXx927_TMTCR_TMODE_ITVL;



	setup_irq(JMR3927_IRQ_TICK, irq);

	cd = &jmr3927_clock_event_device;

	/* Calculate the min / max delta */

	cd->mult = div_sc((unsigned long) JMR3927_IMCLK, NSEC_PER_SEC, 32);

	cd->max_delta_ns	= clockevent_delta2ns(0x7fffffff, cd);

	cd->min_delta_ns	= clockevent_delta2ns(0x300, cd);

	clockevents_register_device(cd);



	setup_irq(JMR3927_IRQ_TICK, &jmr3927_timer_irqaction);

}



#define DO_WRITE_THROUGH