Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 31d9168d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev 

* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (27 commits)
  pata_atiixp: Don't disable
  sata_inic162x: update intro comment, up the version and drop EXPERIMENTAL
  sata_inic162x: add cardbus support
  sata_inic162x: kill now unused SFF related stuff
  sata_inic162x: use IDMA for ATAPI commands
  sata_inic162x: use IDMA for non DMA ATA commands
  sata_inic162x: kill now unused bmdma related stuff
  sata_inic162x: use IDMA for ATA_PROT_DMA
  sata_inic162x: update TF read handling
  sata_inic162x: add / update constants
  sata_inic162x: misc clean ups
  sata_mv use hweight16() for bit counting (V2)
  sata_mv NCQ-EH for FIS-based switching
  sata_mv delayed eh handling
  libata: export ata_eh_analyze_ncq_error
  sata_mv new mv_port_intr function
  sata_mv fix mv_host_intr bug for hc_irq_cause
  sata_mv NCQ and SError fixes for mv_err_intr
  sata_mv rearrange mv_config_fbs
  sata_mv errata workaround for sata25 part 1
  ...
parents 4880d109 05177f17

drivers/ata/Kconfig

+11 −2
Original line number Diff line number Diff line
@@ -205,8 +205,8 @@ config SATA_VITESSE 
	  If unsure, say N.



config SATA_INIC162X

	tristate "Initio 162x SATA support (HIGHLY EXPERIMENTAL)"

	depends on PCI && EXPERIMENTAL

	tristate "Initio 162x SATA support"

	depends on PCI

	help

	  This option enables support for Initio 162x Serial ATA.
@@ -697,6 +697,15 @@ config PATA_SCC 


	  If unsure, say N.



config PATA_SCH

	tristate "Intel SCH PATA support"

	depends on PCI

	help

	  This option enables support for Intel SCH PATA on the Intel

	  SCH (US15W, US15L, UL11L) series host controllers.



	  If unsure, say N.



config PATA_BF54X

	tristate "Blackfin 54x ATAPI support"

	depends on BF542 || BF548 || BF549

drivers/ata/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ obj-$(CONFIG_PATA_SIS) += pata_sis.o 
obj-$(CONFIG_PATA_TRIFLEX)	+= pata_triflex.o

obj-$(CONFIG_PATA_IXP4XX_CF)	+= pata_ixp4xx_cf.o

obj-$(CONFIG_PATA_SCC)		+= pata_scc.o

obj-$(CONFIG_PATA_SCH)		+= pata_sch.o

obj-$(CONFIG_PATA_BF54X)	+= pata_bf54x.o

obj-$(CONFIG_PATA_PLATFORM)	+= pata_platform.o

obj-$(CONFIG_PATA_OF_PLATFORM)	+= pata_of_platform.o

drivers/ata/ahci.c

+1 −3
Original line number Diff line number Diff line
@@ -1267,9 +1267,7 @@ static int ahci_check_ready(struct ata_link *link) 
	void __iomem *port_mmio = ahci_port_base(link->ap);

	u8 status = readl(port_mmio + PORT_TFDATA) & 0xFF;



	if (!(status & ATA_BUSY))

		return 1;

	return 0;

	return ata_check_ready(status);

}



static int ahci_softreset(struct ata_link *link, unsigned int *class,

drivers/ata/ata_generic.c

+6 −0
Original line number Diff line number Diff line
@@ -152,6 +152,12 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id 
	if (dev->vendor == PCI_VENDOR_ID_AL)

		ata_pci_bmdma_clear_simplex(dev);



	if (dev->vendor == PCI_VENDOR_ID_ATI) {

		int rc = pcim_enable_device(dev);

		if (rc < 0)

			return rc;

		pcim_pin_device(dev);

	}

	return ata_pci_sff_init_one(dev, ppi, &generic_sht, NULL);

}

drivers/ata/ata_piix.c

+25 −0
Original line number Diff line number Diff line
@@ -1348,6 +1348,8 @@ static void __devinit piix_init_sidpr(struct ata_host *host) 
{

	struct pci_dev *pdev = to_pci_dev(host->dev);

	struct piix_host_priv *hpriv = host->private_data;

	struct ata_device *dev0 = &host->ports[0]->link.device[0];

	u32 scontrol;

	int i;



	/* check for availability */
@@ -1366,6 +1368,29 @@ static void __devinit piix_init_sidpr(struct ata_host *host) 
		return;



	hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR];



	/* SCR access via SIDPR doesn't work on some configurations.

	 * Give it a test drive by inhibiting power save modes which

	 * we'll do anyway.

	 */

	scontrol = piix_sidpr_read(dev0, SCR_CONTROL);



	/* if IPM is already 3, SCR access is probably working.  Don't

	 * un-inhibit power save modes as BIOS might have inhibited

	 * them for a reason.

	 */

	if ((scontrol & 0xf00) != 0x300) {

		scontrol |= 0x300;

		piix_sidpr_write(dev0, SCR_CONTROL, scontrol);

		scontrol = piix_sidpr_read(dev0, SCR_CONTROL);



		if ((scontrol & 0xf00) != 0x300) {

			dev_printk(KERN_INFO, host->dev, "SCR access via "

				   "SIDPR is available but doesn't work\n");

			return;

		}

	}



	host->ports[0]->ops = &piix_sidpr_sata_ops;

	host->ports[1]->ops = &piix_sidpr_sata_ops;

}