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Commit 313c940d authored by Will Deacon's avatar Will Deacon Committed by Greg Kroah-Hartman
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arm64: entry: Allow handling of undefined instructions from EL1 



[ Upstream commit 0bf0f444b2c49241b2b39aa3cf210d7c95ef6c34 ]

Rather than panic() when taking an undefined instruction exception from
EL1, allow a hook to be registered in case we want to emulate the
instruction, like we will for the SSBS PSTATE manipulation instructions.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 668c01c1

arch/arm64/kernel/entry.S

+1 −1
Original line number Diff line number Diff line
@@ -589,7 +589,7 @@ el1_undef: 
	inherit_daif	pstate=x23, tmp=x2

	mov	x0, sp

	bl	do_undefinstr

	ASM_BUG()

	kernel_exit 1

el1_dbg:

	/*

	 * Debug exception handling

arch/arm64/kernel/traps.c

+7 −4
Original line number Diff line number Diff line
@@ -310,10 +310,12 @@ static int call_undef_hook(struct pt_regs *regs) 
	int (*fn)(struct pt_regs *regs, u32 instr) = NULL;

	void __user *pc = (void __user *)instruction_pointer(regs);



	if (!user_mode(regs))

		return 1;



	if (compat_thumb_mode(regs)) {

	if (!user_mode(regs)) {

		__le32 instr_le;

		if (probe_kernel_address((__force __le32 *)pc, instr_le))

			goto exit;

		instr = le32_to_cpu(instr_le);

	} else if (compat_thumb_mode(regs)) {

		/* 16-bit Thumb instruction */

		__le16 instr_le;

		if (get_user(instr_le, (__le16 __user *)pc))
@@ -407,6 +409,7 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 
		return;



	force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc);

	BUG_ON(!user_mode(regs));

}



void cpu_enable_cache_maint_trap(const struct arm64_cpu_capabilities *__unused)