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Commit 30870b93 authored by Mike Frysinger's avatar Mike Frysinger Committed by Linus Torvalds
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Blackfin arch: dont clear status register bits in SWRST so we can actually use it

parent eb8d5f6c
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+0 −6
Original line number Diff line number Diff line
@@ -468,12 +468,6 @@ ENTRY(_bfin_reset)
	w[p0] = r0.l;
#endif

	/* Clear the bits 13-15 in SWRST if they werent cleared */
	p0.h = hi(SWRST);
	p0.l = lo(SWRST);
	csync;
	r0.l = w[p0];

	/* Clear the IMASK register */
	p0.h = hi(IMASK);
	p0.l = lo(IMASK);
+0 −6
Original line number Diff line number Diff line
@@ -504,12 +504,6 @@ _delay_lab1_end:
	nop;
#endif

	/* Clear the bits 13-15 in SWRST if they werent cleared */
	p0.h = hi(SWRST);
	p0.l = lo(SWRST);
	csync;
	r0.l = w[p0];

	/* Clear the IMASK register */
	p0.h = hi(IMASK);
	p0.l = lo(IMASK);
+0 −6
Original line number Diff line number Diff line
@@ -414,12 +414,6 @@ ENTRY(_bfin_reset)
	w[p0] = r0.l;
#endif

	/* Clear the bits 13-15 in SWRST if they werent cleared */
	p0.h = hi(SICA_SWRST);
	p0.l = lo(SICA_SWRST);
	csync;
	r0.l = w[p0];

	/* Clear the IMASK register */
	p0.h = hi(IMASK);
	p0.l = lo(IMASK);