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Commit 304d10ab authored by Chanwoo Choi's avatar Chanwoo Choi Committed by Krzysztof Kozlowski
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ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 



This patch adds the bus nodes using VDD_INT for Exynos3250 SoC.
Exynos3250 has following AXI buses to translate data between
DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK400 clock for MCUISP
- ACLK266 clock for ISP
- ACLK200 clock for FSYS
- ACLK160 clock for LCD0
- ACLK100 clock for PERIL
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
parent e9a53680

arch/arm/boot/dts/exynos3250.dtsi

+147 −0
Original line number Diff line number Diff line
@@ -722,6 +722,153 @@ 
				opp-microvolt = <875000>;

			};

		};



		bus_leftbus: bus_leftbus {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_GDL>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_rightbus: bus_rightbus {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_GDR>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_lcd0: bus_lcd0 {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_160>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_fsys: bus_fsys {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_200>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_mcuisp: bus_mcuisp {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_400_MCUISP>;

			clock-names = "bus";

			operating-points-v2 = <&bus_mcuisp_opp_table>;

			status = "disabled";

		};



		bus_isp: bus_isp {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_266>;

			clock-names = "bus";

			operating-points-v2 = <&bus_isp_opp_table>;

			status = "disabled";

		};



		bus_peril: bus_peril {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_DIV_ACLK_100>;

			clock-names = "bus";

			operating-points-v2 = <&bus_peril_opp_table>;

			status = "disabled";

		};



		bus_mfc: bus_mfc {

			compatible = "samsung,exynos-bus";

			clocks = <&cmu CLK_SCLK_MFC>;

			clock-names = "bus";

			operating-points-v2 = <&bus_leftbus_opp_table>;

			status = "disabled";

		};



		bus_leftbus_opp_table: opp_table2 {

			compatible = "operating-points-v2";

			opp-shared;



			opp@50000000 {

				opp-hz = /bits/ 64 <50000000>;

				opp-microvolt = <900000>;

			};

			opp@80000000 {

				opp-hz = /bits/ 64 <80000000>;

				opp-microvolt = <900000>;

			};

			opp@100000000 {

				opp-hz = /bits/ 64 <100000000>;

				opp-microvolt = <1000000>;

			};

			opp@134000000 {

				opp-hz = /bits/ 64 <134000000>;

				opp-microvolt = <1000000>;

			};

			opp@200000000 {

				opp-hz = /bits/ 64 <200000000>;

				opp-microvolt = <1000000>;

			};

		};



		bus_mcuisp_opp_table: opp_table3 {

			compatible = "operating-points-v2";

			opp-shared;



			opp@50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp@80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp@100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp@200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp@400000000 {

				opp-hz = /bits/ 64 <400000000>;

			};

		};



		bus_isp_opp_table: opp_table4 {

			compatible = "operating-points-v2";

			opp-shared;



			opp@50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp@80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp@100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

			opp@200000000 {

				opp-hz = /bits/ 64 <200000000>;

			};

			opp@300000000 {

				opp-hz = /bits/ 64 <300000000>;

			};

		};



		bus_peril_opp_table: opp_table5 {

			compatible = "operating-points-v2";

			opp-shared;



			opp@50000000 {

				opp-hz = /bits/ 64 <50000000>;

			};

			opp@80000000 {

				opp-hz = /bits/ 64 <80000000>;

			};

			opp@100000000 {

				opp-hz = /bits/ 64 <100000000>;

			};

		};

	};

};