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Commit 30062fb0 authored by York Sun's avatar York Sun Committed by Shawn Guo
Browse files

arm64: dts: Add DDR memory controller for Layerscape SoCs 



Add DDR memory controller nodes to enable EDAC driver.

Signed-off-by: default avatarYork Sun <york.sun@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 29b4817d

arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -247,6 +247,13 @@ 
			bus-width = <4>;

		};



		ddr: memory-controller@1080000 {

			compatible = "fsl,qoriq-memory-controller";

			reg = <0x0 0x1080000 0x0 0x1000>;

			interrupts = <0 144 0x4>;

			big-endian;

		};



		dspi0: dspi@2100000 {

			compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";

			#address-cells = <1>;

arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -715,4 +715,18 @@ 
			interrupts = <0 12 4>;

		};

	};



	ddr1: memory-controller@1080000 {

		compatible = "fsl,qoriq-memory-controller";

		reg = <0x0 0x1080000 0x0 0x1000>;

		interrupts = <0 17 0x4>;

		little-endian;

	};



	ddr2: memory-controller@1090000 {

		compatible = "fsl,qoriq-memory-controller";

		reg = <0x0 0x1090000 0x0 0x1000>;

		interrupts = <0 18 0x4>;

		little-endian;

	};

};