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Commit 2fd86589 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Santosh Shilimkar
Browse files

arm: Implement l2x0 cache disable functions 



Add flush_all, inv_all and disable functions to the l2x0 code. These
functions are called from kexec code to prevent random crashes in the
new kernel.

Platforms like OMAP which control L2 enable/disable via SMI mode can
override the outer_cache.disable() function to implement their own.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Acked-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
parent ae360a78

arch/arm/mm/cache-l2x0.c

+27 −1
Original line number Diff line number Diff line
@@ -112,12 +112,26 @@ static void l2x0_cache_sync(void) 
	spin_unlock_irqrestore(&l2x0_lock, flags);

}



static inline void l2x0_inv_all(void)

static void l2x0_flush_all(void)

{

	unsigned long flags;



	/* clean all ways */

	spin_lock_irqsave(&l2x0_lock, flags);

	writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY);

	cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask);

	cache_sync();

	spin_unlock_irqrestore(&l2x0_lock, flags);

}



static void l2x0_inv_all(void)

{

	unsigned long flags;



	/* invalidate all ways */

	spin_lock_irqsave(&l2x0_lock, flags);

	/* Invalidating when L2 is enabled is a nono */

	BUG_ON(readl(l2x0_base + L2X0_CTRL) & 1);

	writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);

	cache_wait_way(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);

	cache_sync();
@@ -215,6 +229,15 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) 
	spin_unlock_irqrestore(&l2x0_lock, flags);

}



static void l2x0_disable(void)

{

	unsigned long flags;



	spin_lock_irqsave(&l2x0_lock, flags);

	writel(0, l2x0_base + L2X0_CTRL);

	spin_unlock_irqrestore(&l2x0_lock, flags);

}



void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)

{

	__u32 aux;
@@ -272,6 +295,9 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) 
	outer_cache.clean_range = l2x0_clean_range;

	outer_cache.flush_range = l2x0_flush_range;

	outer_cache.sync = l2x0_cache_sync;

	outer_cache.flush_all = l2x0_flush_all;

	outer_cache.inv_all = l2x0_inv_all;

	outer_cache.disable = l2x0_disable;



	printk(KERN_INFO "%s cache controller enabled\n", type);

	printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x\n",