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Commit 2f74053b authored by Jayachandran B's avatar Jayachandran B Committed by Mark Brown
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ASoC: Intel: Skylake: Update DSP stall bits



The stall bits needs to comprehend the number of DSP cores
running, so update the stall and unstall register writes to
comprehend SKL_DSP_CORES_MASK values as well.

Signed-off-by: default avatarJayachandran B <jayachandran.b@intel.com>
Signed-off-by: default avatarRamesh Babu <ramesh.babu@intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2023576d
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+5 −6
Original line number Original line Diff line number Diff line
@@ -106,8 +106,8 @@ static bool is_skl_dsp_core_enable(struct sst_dsp *ctx)
static int skl_dsp_reset_core(struct sst_dsp *ctx)
static int skl_dsp_reset_core(struct sst_dsp *ctx)
{
{
	/* stall core */
	/* stall core */
	sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
	sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
			 sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
			SKL_ADSPCS_CSTALL_MASK,
			SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
			SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));


	/* set reset state */
	/* set reset state */
@@ -127,9 +127,8 @@ int skl_dsp_start_core(struct sst_dsp *ctx)


	/* run core */
	/* run core */
	dev_dbg(ctx->dev, "run core...\n");
	dev_dbg(ctx->dev, "run core...\n");
	sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
	sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS,
			 sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) &
			SKL_ADSPCS_CSTALL_MASK, 0);
				~SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));


	if (!is_skl_dsp_core_enable(ctx)) {
	if (!is_skl_dsp_core_enable(ctx)) {
		skl_dsp_reset_core(ctx);
		skl_dsp_reset_core(ctx);