Commit 2f3428b5 authored Sep 26, 2014 by Joonyoung Shim Committed by Krzysztof Kozlowski Jun 22, 2016

ARM: EXYNOS: Fix UART address selection for DEBUG_LL



The Exynos542x SoCs using A15+A7 can boot to A15 or A7. If it boots using
A7 (like on Odroid XU family boards), it can't choose right UART
physical address only the part number of CP15. Fix the detection logic
by checking the Cluster ID additionally.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
[k.kozlowski: Extend commit message]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

parent 17e0645e

arch/arm/include/debug/exynos.S

+5 −1

Original line number	Diff line number	Diff line
		@@ -24,7 +24,11 @@
		mrc p15, 0, \tmp, c0, c0, 0
		and \tmp, \tmp, #0xf0
		teq \tmp, #0xf0 @@ A15
		ldreq \rp, =EXYNOS5_PA_UART
		beq 100f
		mrc p15, 0, \tmp, c0, c0, 5
		and \tmp, \tmp, #0xf00
		teq \tmp, #0x100 @@ A15 + A7 but boot to A7
		100: ldreq \rp, =EXYNOS5_PA_UART
		movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
		ldr \rv, =S3C_VA_UART
		#if CONFIG_DEBUG_S3C_UART != 0