Loading arch/arm64/boot/dts/qcom/lito.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/spmi/spmi.h> / { model = "Qualcomm Technologies, Inc. Lito"; Loading Loading @@ -947,6 +948,25 @@ #reset-cells = <1>; }; spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>, <0xe700000 0xa0000>, <0xc40a000 0x26000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <1>; #size-cells = <1>; interrupt-controller; #interrupt-cells = <4>; cell-index = <0>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xe00>; /* PHY regs */ reg-names = "phy_mem"; Loading Loading
arch/arm64/boot/dts/qcom/lito.dtsi +20 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/spmi/spmi.h> / { model = "Qualcomm Technologies, Inc. Lito"; Loading Loading @@ -947,6 +948,25 @@ #reset-cells = <1>; }; spmi_bus: qcom,spmi@c440000 { compatible = "qcom,spmi-pmic-arb"; reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>, <0xe700000 0xa0000>, <0xc40a000 0x26000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <1>; #size-cells = <1>; interrupt-controller; #interrupt-cells = <4>; cell-index = <0>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xe00>; /* PHY regs */ reg-names = "phy_mem"; Loading