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Commit 2eaab06e authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: dt: tegra: consistent basic property ordering 



Put properties in order compatible, reg, interrupts, then anything else
the node has.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarOlof Johansson <olof@lixom.net>
parent c04abb3a

arch/arm/boot/dts/tegra-paz00.dts

+2 −2
Original line number Diff line number Diff line
@@ -270,11 +270,11 @@ 
	};



	nvec {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,nvec";

		reg = <0x7000c500 0x100>;

		interrupts = <0 92 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-frequency = <80000>;

		request-gpios = <&gpio 170 0>; /* gpio PV2 */

		slave-addr = <138>;

arch/arm/boot/dts/tegra20.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -6,10 +6,10 @@ 


	intc: interrupt-controller {

		compatible = "arm,cortex-a9-gic";

		interrupt-controller;

		#interrupt-cells = <3>;

		reg = <0x50041000 0x1000

		       0x50040100 0x0100>;

		interrupt-controller;

		#interrupt-cells = <3>;

	};



	apbdma: dma {
@@ -117,35 +117,35 @@ 
	};



	i2c@7000c000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra20-i2c";

		reg = <0x7000c000 0x100>;

		interrupts = <0 38 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000c400 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra20-i2c";

		reg = <0x7000c400 0x100>;

		interrupts = <0 84 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000c500 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra20-i2c";

		reg = <0x7000c500 0x100>;

		interrupts = <0 92 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000d000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra20-i2c-dvc";

		reg = <0x7000d000 0x200>;

		interrupts = <0 53 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	pmc {
@@ -167,10 +167,10 @@ 
	};



	emc {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra20-emc";

		reg = <0x7000f400 0x200>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	usb@c5000000 {

arch/arm/boot/dts/tegra30.dtsi

+12 −12
Original line number Diff line number Diff line
@@ -6,10 +6,10 @@ 


	intc: interrupt-controller {

		compatible = "arm,cortex-a9-gic";

		interrupt-controller;

		#interrupt-cells = <3>;

		reg = <0x50041000 0x1000

		       0x50040100 0x0100>;

		interrupt-controller;

		#interrupt-cells = <3>;

	};



	apbdma: dma {
@@ -113,43 +113,43 @@ 
	};



	i2c@7000c000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000c000 0x100>;

		interrupts = <0 38 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000c400 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000c400 0x100>;

		interrupts = <0 84 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000c500 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000c500 0x100>;

		interrupts = <0 92 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000c700 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000c700 0x100>;

		interrupts = <0 120 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	i2c@7000d000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";

		reg = <0x7000d000 0x100>;

		interrupts = <0 53 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

	};



	pmc {