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Commit 2e94ac42 authored by Pankaj Dubey's avatar Pankaj Dubey Committed by Kukjin Kim
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ARM: EXYNOS: Refactored code for using PMU address via DT 



Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 based SoC.

Also as we have removed static mappings from "regs-pmu.h" it does
not need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".

Signed-off-by: default avatarPankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 20fe6f98

arch/arm/mach-exynos/common.h

+12 −2
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@ extern void exynos_cpu_die(unsigned int cpu); 


/* PMU(Power Management Unit) support */



#define PMU_TABLE_END	NULL

#define PMU_TABLE_END	(-1U)



enum sys_powerdown {

	SYS_AFTR,
@@ -144,7 +144,7 @@ enum sys_powerdown { 
};



struct exynos_pmu_conf {

	void __iomem *reg;

	unsigned int offset;

	unsigned int val[NUM_SYS_POWERDOWN];

};
@@ -160,4 +160,14 @@ extern void exynos_enter_aftr(void); 
extern void s5p_init_cpu(void __iomem *cpuid_addr);

extern unsigned int samsung_rev(void);



static inline void pmu_raw_writel(u32 val, u32 offset)

{

	__raw_writel(val, pmu_base_addr + offset);

}



static inline u32 pmu_raw_readl(u32 offset)

{

	return __raw_readl(pmu_base_addr + offset);

}



#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */

arch/arm/mach-exynos/exynos.c

+1 −11
Original line number Diff line number Diff line
@@ -60,11 +60,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { 
		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSTIMER),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_PMU,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_PMU),

		.length		= SZ_64K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_COMBINER_BASE,

		.pfn		= __phys_to_pfn(EXYNOS4_PA_COMBINER),
@@ -139,11 +134,6 @@ static struct map_desc exynos5_iodesc[] __initdata = { 
		.pfn		= __phys_to_pfn(EXYNOS5_PA_CMU),

		.length		= 144 * SZ_1K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_PMU,

		.pfn		= __phys_to_pfn(EXYNOS5_PA_PMU),

		.length		= SZ_64K,

		.type		= MT_DEVICE,

	},

};
@@ -151,7 +141,7 @@ static void exynos_restart(enum reboot_mode mode, const char *cmd) 
{

	struct device_node *np;

	u32 val = 0x1;

	void __iomem *addr = EXYNOS_SWRESET;

	void __iomem *addr = pmu_base_addr + EXYNOS_SWRESET;



	if (of_machine_is_compatible("samsung,exynos5440")) {

		u32 status;

arch/arm/mach-exynos/include/mach/map.h

+0 −3
Original line number Diff line number Diff line
@@ -27,9 +27,6 @@ 
#define EXYNOS4_PA_SYSCON		0x10010000

#define EXYNOS5_PA_SYSCON		0x10050100



#define EXYNOS4_PA_PMU			0x10020000

#define EXYNOS5_PA_PMU			0x10040000



#define EXYNOS4_PA_CMU			0x10030000

#define EXYNOS5_PA_CMU			0x10010000

arch/arm/mach-exynos/mcpm-exynos.c

+4 −4
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ 
	"dsb\n\t" \

	"ldmfd	sp!, {fp, ip}" \

	: \

	: "Ir" (S5P_INFORM0) \

	: "Ir" (pmu_base_addr + S5P_INFORM0) \

	: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \

	  "r9", "r10", "lr", "memory")
@@ -337,7 +337,7 @@ static int __init exynos_mcpm_init(void) 
	 * To increase the stability of KFC reset we need to program

	 * the PMU SPARE3 register

	 */

	__raw_writel(EXYNOS5420_SWRESET_KFC_SEL, S5P_PMU_SPARE3);

	pmu_raw_writel(EXYNOS5420_SWRESET_KFC_SEL, S5P_PMU_SPARE3);



	exynos_mcpm_usage_count_init();
@@ -366,11 +366,11 @@ static int __init exynos_mcpm_init(void) 
	 * turned on before the first man is powered up.

	 */

	for (i = 0; i < EXYNOS5420_NR_CLUSTERS; i++) {

		value = __raw_readl(EXYNOS_COMMON_OPTION(i));

		value = pmu_raw_readl(EXYNOS_COMMON_OPTION(i));

		value |= EXYNOS5420_ENABLE_AUTOMATIC_CORE_DOWN |

			 EXYNOS5420_USE_ARM_CORE_DOWN_STATE    |

			 EXYNOS5420_USE_L2_COMMON_UP_STATE;

		__raw_writel(value, EXYNOS_COMMON_OPTION(i));

		pmu_raw_writel(value, EXYNOS_COMMON_OPTION(i));

	}



	/*

arch/arm/mach-exynos/platsmp.c

+3 −1
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ 
#include <asm/smp_scu.h>

#include <asm/firmware.h>



#include <mach/map.h>



#include "common.h"

#include "regs-pmu.h"
@@ -34,7 +36,7 @@ extern void exynos4_secondary_startup(void); 
static inline void __iomem *cpu_boot_reg_base(void)

{

	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)

		return S5P_INFORM5;

		return pmu_base_addr + S5P_INFORM5;

	return sysram_base_addr;

}