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Commit 2de38138 authored by Paulo Zanoni's avatar Paulo Zanoni
Browse files

drm/i915: add the BXT and CNL DPLL registers to pipe_config_compare 



Looks like we were missing them.

Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170922205343.16006-2-paulo.r.zanoni@intel.com
parent 84e8978e

drivers/gpu/drm/i915/intel_display.c

+12 −0
Original line number Diff line number Diff line
@@ -11327,6 +11327,18 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv, 
	PIPE_CONF_CHECK_X(dpll_hw_state.ctrl1);

	PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr1);

	PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr2);

	PIPE_CONF_CHECK_X(dpll_hw_state.cfgcr0);

	PIPE_CONF_CHECK_X(dpll_hw_state.ebb0);

	PIPE_CONF_CHECK_X(dpll_hw_state.ebb4);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll0);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll1);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll2);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll3);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll6);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll8);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll9);

	PIPE_CONF_CHECK_X(dpll_hw_state.pll10);

	PIPE_CONF_CHECK_X(dpll_hw_state.pcsdw12);



	PIPE_CONF_CHECK_X(dsi_pll.ctrl);

	PIPE_CONF_CHECK_X(dsi_pll.div);