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Commit 2d93fc85 authored by Matan Barak's avatar Matan Barak Committed by Jason Gunthorpe
Browse files

IB/mlx5: Add ability to hash by IPSEC_SPI when creating a TIR 



When a Raw Ethernet QP is created, we actually create a few objects.
One of these objects is a TIR. Currently, a TIR could hash (and spread
the traffic) by IP or port only. Adding a hashing by IPSec SPI to TIR
creation with the required UAPI bit.

Signed-off-by: default avatarMatan Barak <matanb@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent c03faa56

drivers/infiniband/hw/mlx5/main.c

+4 −0
Original line number Diff line number Diff line
@@ -856,6 +856,10 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, 
						MLX5_RX_HASH_SRC_PORT_UDP |

						MLX5_RX_HASH_DST_PORT_UDP |

						MLX5_RX_HASH_INNER;

			if (mlx5_accel_ipsec_device_caps(dev->mdev) &

			    MLX5_ACCEL_IPSEC_CAP_DEVICE)

				resp.rss_caps.rx_hash_fields_mask |=

					MLX5_RX_HASH_IPSEC_SPI;

			resp.response_length += sizeof(resp.rss_caps);

		}

	} else {

drivers/infiniband/hw/mlx5/qp.c

+12 −4
Original line number Diff line number Diff line
@@ -1413,6 +1413,7 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 
	void *tirc;

	void *hfso;

	u32 selected_fields = 0;

	u32 outer_l4;

	size_t min_resp_len;

	u32 tdn = mucontext->tdn;

	struct mlx5_ib_create_qp_rss ucmd = {};
@@ -1543,10 +1544,14 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 
		MLX5_SET(rx_hash_field_select, hfso, l3_prot_type,

			 MLX5_L3_PROT_TYPE_IPV6);



	if (((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||

	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) &&

	outer_l4 = ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_TCP) ||

		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_TCP)) << 0 |

		   ((ucmd.rx_hash_fields_mask & MLX5_RX_HASH_SRC_PORT_UDP) ||

	     (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))) {

		    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP)) << 1 |

		   (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI) << 2;



	/* Check that only one l4 protocol is set */

	if (outer_l4 & (outer_l4 - 1)) {

		err = -EINVAL;

		goto err;

	}
@@ -1577,6 +1582,9 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, 
	    (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_DST_PORT_UDP))

		selected_fields |= MLX5_HASH_FIELD_SEL_L4_DPORT;



	if (ucmd.rx_hash_fields_mask & MLX5_RX_HASH_IPSEC_SPI)

		selected_fields |= MLX5_HASH_FIELD_SEL_IPSEC_SPI;



	MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);



create_tir:

include/uapi/rdma/mlx5-abi.h

+1 −0
Original line number Diff line number Diff line
@@ -327,6 +327,7 @@ enum mlx5_rx_hash_fields { 
	MLX5_RX_HASH_DST_PORT_TCP	= 1 << 5,

	MLX5_RX_HASH_SRC_PORT_UDP	= 1 << 6,

	MLX5_RX_HASH_DST_PORT_UDP	= 1 << 7,

	MLX5_RX_HASH_IPSEC_SPI		= 1 << 8,

	/* Save bits for future fields */

	MLX5_RX_HASH_INNER		= (1UL << 31),

};