Commit 2cde3716 authored Oct 10, 2017 by Nicholas Piggin Committed by Paul Mackerras Oct 14, 2017

KVM: PPC: Book3S HV: POWER9 more doorbell fixes



- Add another case where msgsync is required.
- Required barrier sequence for global doorbells is msgsync ; lwsync

When msgsnd is used for IPIs to other cores, msgsync must be executed by
the target to order stores performed on the source before its msgsnd
(provided the source executes the appropriate sync).

Fixes: 1704a81c ("KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores on POWER9")
Cc: stable@vger.kernel.org # v4.10+
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

parent ac64115a

arch/powerpc/kvm/book3s_hv_rmhandlers.S

+5 −0

Original line number	Diff line number	Diff line
		@@ -1310,6 +1310,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
		bne 3f
		BEGIN_FTR_SECTION
		PPC_MSGSYNC
		lwsync
		END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
		lbz r0, HSTATE_HOST_IPI(r13)
		cmpwi r0, 0
		@@ -2788,6 +2789,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
		PPC_MSGCLR(6)
		/* see if it's a host IPI */
		li r3, 1
		BEGIN_FTR_SECTION
		PPC_MSGSYNC
		lwsync
		END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
		lbz r0, HSTATE_HOST_IPI(r13)
		cmpwi r0, 0
		bnelr