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Commit 2cb6a070 authored by Olof Johansson's avatar Olof Johansson
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Merge tag 'v3.8-rc7' into next/boards

Linux 3.8-rc7
parents 78d9b805 836dc9e3
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@@ -2438,7 +2438,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
			real-time workloads.  It can also improve energy
			efficiency for asymmetric multiprocessors.

	rcu_nocbs_poll	[KNL,BOOT]
	rcu_nocb_poll	[KNL,BOOT]
			Rather than requiring that offloaded CPUs
			(specified by rcu_nocbs= above) explicitly
			awaken the corresponding "rcuoN" kthreads,
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@@ -57,7 +57,7 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment
Protocol 2.11:	(Kernel 3.6) Added a field for offset of EFI handover
		protocol entry point.

Protocol 2.12:	(Kernel 3.9) Added the xloadflags field and extension fields
Protocol 2.12:	(Kernel 3.8) Added the xloadflags field and extension fields
	 	to struct boot_params for for loading bzImage and ramdisk
		above 4G in 64bit.

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@@ -1489,7 +1489,7 @@ AVR32 ARCHITECTURE
M:	Haavard Skinnemoen <hskinnemoen@gmail.com>
M:	Hans-Christian Egtvedt <egtvedt@samfundet.no>
W:	http://www.atmel.com/products/AVR32/
W:	http://avr32linux.org/
W:	http://mirror.egtvedt.no/avr32linux.org/
W:	http://avrfreaks.net/
S:	Maintained
F:	arch/avr32/
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VERSION = 3
PATCHLEVEL = 8
SUBLEVEL = 0
EXTRAVERSION = -rc6
EXTRAVERSION = -rc7
NAME = Unicycling Gorilla

# *DOCUMENTATION*
+23 −2
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@@ -351,6 +351,25 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq)
	irq_set_chained_handler(irq, gic_handle_cascade_irq);
}

static u8 gic_get_cpumask(struct gic_chip_data *gic)
{
	void __iomem *base = gic_data_dist_base(gic);
	u32 mask, i;

	for (i = mask = 0; i < 32; i += 4) {
		mask = readl_relaxed(base + GIC_DIST_TARGET + i);
		mask |= mask >> 16;
		mask |= mask >> 8;
		if (mask)
			break;
	}

	if (!mask)
		pr_crit("GIC CPU mask not found - kernel will fail to boot.\n");

	return mask;
}

static void __init gic_dist_init(struct gic_chip_data *gic)
{
	unsigned int i;
@@ -369,7 +388,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
	/*
	 * Set all global interrupts to this CPU only.
	 */
	cpumask = readl_relaxed(base + GIC_DIST_TARGET + 0);
	cpumask = gic_get_cpumask(gic);
	cpumask |= cpumask << 8;
	cpumask |= cpumask << 16;
	for (i = 32; i < gic_irqs; i += 4)
		writel_relaxed(cpumask, base + GIC_DIST_TARGET + i * 4 / 4);

@@ -400,7 +421,7 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
	 * Get what the GIC says our CPU mask is.
	 */
	BUG_ON(cpu >= NR_GIC_CPU_IF);
	cpu_mask = readl_relaxed(dist_base + GIC_DIST_TARGET + 0);
	cpu_mask = gic_get_cpumask(gic);
	gic_cpu_map[cpu] = cpu_mask;

	/*
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