Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2cb681b6 authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
Browse files

drm/amdgpu:re-write sriov_reinit_early/late (v2) 



1,this way we make those routines compatible with the sequence
  requirment for both Tonga and Vega10
2,ignore PSP hw init when doing TDR, because for SR-IOV device
the ucode won't get lost after VF FLR, so no need to invoke PSP
doing the ucode reloading again.

v2: squash in ARRAY_SIZE fix

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Reviewed-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 17b2e332

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+39 −24
Original line number Diff line number Diff line
@@ -1815,19 +1815,27 @@ static int amdgpu_sriov_reinit_early(struct amdgpu_device *adev) 
{

	int i, r;



	for (i = 0; i < adev->num_ip_blocks; i++) {

		if (!adev->ip_blocks[i].status.valid)

			continue;

	static enum amd_ip_block_type ip_order[] = {

		AMD_IP_BLOCK_TYPE_GMC,

		AMD_IP_BLOCK_TYPE_COMMON,

		AMD_IP_BLOCK_TYPE_GFXHUB,

		AMD_IP_BLOCK_TYPE_MMHUB,

		AMD_IP_BLOCK_TYPE_IH,

	};



		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||

				adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||

				adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH)

			r = adev->ip_blocks[i].version->funcs->hw_init(adev);

	for (i = 0; i < ARRAY_SIZE(ip_order); i++) {

		int j;

		struct amdgpu_ip_block *block;



		if (r) {

			DRM_ERROR("resume of IP block <%s> failed %d\n",

				  adev->ip_blocks[i].version->funcs->name, r);

			return r;

		for (j = 0; j < adev->num_ip_blocks; j++) {

			block = &adev->ip_blocks[j];



			if (block->version->type != ip_order[i] ||

				!block->status.valid)

				continue;



			r = block->version->funcs->hw_init(adev);

			DRM_INFO("RE-INIT: %s %s\n", block->version->funcs->name, r?"failed":"successed");

		}

	}
@@ -1838,20 +1846,27 @@ static int amdgpu_sriov_reinit_late(struct amdgpu_device *adev) 
{

	int i, r;



	for (i = 0; i < adev->num_ip_blocks; i++) {

		if (!adev->ip_blocks[i].status.valid)

			continue;

	static enum amd_ip_block_type ip_order[] = {

		AMD_IP_BLOCK_TYPE_SMC,

		AMD_IP_BLOCK_TYPE_DCE,

		AMD_IP_BLOCK_TYPE_GFX,

		AMD_IP_BLOCK_TYPE_SDMA,

		AMD_IP_BLOCK_TYPE_VCE,

	};



	for (i = 0; i < ARRAY_SIZE(ip_order); i++) {

		int j;

		struct amdgpu_ip_block *block;



		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON ||

				adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC ||

				adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH )

		for (j = 0; j < adev->num_ip_blocks; j++) {

			block = &adev->ip_blocks[j];



			if (block->version->type != ip_order[i] ||

				!block->status.valid)

				continue;



		r = adev->ip_blocks[i].version->funcs->hw_init(adev);

		if (r) {

			DRM_ERROR("resume of IP block <%s> failed %d\n",

				  adev->ip_blocks[i].version->funcs->name, r);

			return r;

			r = block->version->funcs->hw_init(adev);

			DRM_INFO("RE-INIT: %s %s\n", block->version->funcs->name, r?"failed":"successed");

		}

	}