Merge "ARM: dts: msm: add dp and dp_pll node for lito target" (2c1119e2) · Commits · e / devices / android_kernel_fairphone_FP4

qcom/lito-audio.dtsi

+9 −0

Original line number	Diff line number	Diff line
		@@ -148,5 +148,14 @@
		"msm-dai-cdc-dma-dev.45115",
		"msm-dai-cdc-dma-dev.45116",
		"msm-dai-cdc-dma-dev.45118";
		fsa4480-i2c-handle = <&fsa4480>;
		};
		};

		&qupv3_se9_i2c {
		status = "ok";
		fsa4480: fsa4480@43 {
		compatible = "qcom,fsa4480-i2c";
		reg = <0x43>;
		};
		};

qcom/lito-pinctrl.dtsi

+26 −0

Original line number	Diff line number	Diff line
		@@ -1558,5 +1558,31 @@
		};
		};
		};

		sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_susppend {
		mux {
		pins = "gpio114";
		function = "";
		};

		config {
		pins = "gpio114";
		bias-pull-down;
		drive-strength = <2>;
		};
		};

		sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active {
		mux {
		pins = "gpio114";
		function = "gpio";
		};

		config {
		pins = "gpio114";
		bias-disable;
		drive-strenght = <16>;
		};
		};
		};
		};

qcom/lito-sde-display.dtsi

+13 −1

Original line number	Diff line number	Diff line
		@@ -144,8 +144,20 @@
		};
		};

		&sde_dp {
		qcom,dp-usbpd-detection = <&pm7250b_pdphy>;
		qcom,ext-disp = <&ext_disp>;
		qcom,dp-aux-switch = <&fsa4480>;

		qcom,usbplug-cc-gpio = <&tlmm 114 0>;

		pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";
		pinctrl-0 = <&sde_dp_usbplug_cc_active>;
		pinctrl-1 = <&sde_dp_usbplug_cc_suspend>;
		};

		&mdss_mdp {
		connectors = <&sde_wb &sde_dsi>;
		connectors = <&sde_wb &sde_dsi &sde_dp>;
		};

		/* PHY TIMINGS REVISION W */

qcom/lito-sde-pll.dtsi

+23 −0

Original line number	Diff line number	Diff line
		@@ -56,4 +56,27 @@
		};
		};
		};
		mdss_dp_pll: qcom,mdss_dp_pll@c011000 {
		compatible = "qcom,mdss_dp_pll_7nm";
		label = "MDSS DP PLL";
		cell-index = <0>;
		#clock-cells = <1>;

		reg = <0x088ea000 0x200>,
		<0x088eaa00 0x200>,
		<0x088ea200 0x200>,
		<0x088ea600 0x200>,
		<0xaf03000 0x8>;
		reg-names = "pll_base", "phy_base", "ln_tx0_base",
		"ln_tx1_base", "gdsc_base";

		clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
		<&rpmhcc RPMH_CXO_CLK>,
		<&gcc GCC_DISP_AHB_CLK>,
		<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
		clock-names = "iface_clk", "ref_clk_src",
		"gcc_iface", "pipe_clk";
		clock-rate = <0>;
		};

		};

qcom/lito-sde.dtsi

+104 −0

Original line number	Diff line number	Diff line
		@@ -493,6 +493,110 @@
		};
		};

		sde_dp: qcom,dp_display@ae90000 {
		cell-index = <0>;
		compatible = "qcom,dp-display";

		vdda-lp2-supply = <&L9A>;
		vdda-0p9-supply = <&L5A>;
		reg = <0xae90000 0x0dc>,
		<0xae90200 0x0c0>,
		<0xae90400 0x508>,
		<0xae91000 0x094>,
		<0x88eaa00 0x198>,
		<0x88ea200 0x150>,
		<0x88ea600 0x150>,
		<0xaf02000 0x2c4>,
		<0x780000 0x6228>,
		<0x88ea040 0x10>,
		<0x88e8000 0x20>,
		<0x0aee1000 0x2a>,
		<0xae91400 0x095>;
		reg-names = "dp_ahb", "dp_aux", "dp_link",
		"dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1",
		"dp_mmss_cc", "qfprom_physical", "dp_pll",
		"usb3_dp_com", "hdcp_physical", "dp_p1";

		interrupt-parent = <&mdss_mdp>;
		interrupts = <12 0>;

		clocks = <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
		<&gcc GCC_USB3_PRIM_CLKREF_CLK>,
		<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
		<&rpmhcc RPMH_CXO_CLK>,
		<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
		<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
		<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
		<&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,
		<&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,
		<&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,
		<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
		<&dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
		clock-names = "core_aux_clk", "core_usb_ref_clk",
		"core_usb_pipe_clk", "core_usb_ref_clk_src",
		"link_clk", "link_iface_clk",
		"pixel_clk_rcg", "pixel_parent",
		"pixel1_clk_rcg", "pixel1_parent",
		"strm0_pixel_clk", "strm1_pixel_clk";

		qcom,phy-version = <0x420>;
		qcom,aux-cfg0-settings = [20 00];
		qcom,aux-cfg1-settings = [24 13];
		qcom,aux-cfg2-settings = [28 A4];
		qcom,aux-cfg3-settings = [2c 00];
		qcom,aux-cfg4-settings = [30 0a];
		qcom,aux-cfg5-settings = [34 26];
		qcom,aux-cfg6-settings = [38 0a];
		qcom,aux-cfg7-settings = [3c 03];
		qcom,aux-cfg8-settings = [40 b7];
		qcom,aux-cfg9-settings = [44 03];

		qcom,max-pclk-frequency-khz = <675000>;

		qcom,ctrl-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,ctrl-supply-entry@0 {
		reg = <0>;
		qcom,supply-name = "vdda-1p2";
		qcom,supply-min-voltage = <1200000>;
		qcom,supply-max-voltage = <1200000>;
		qcom,supply-enable-load = <21800>;
		qcom,supply-disable-load = <0>;
		};
		};

		qcom,phy-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,phy-supply-entry@0 {
		reg = <0>;
		qcom,supply-name = "vdda-0p9";
		qcom,supply-min-voltage = <880000>;
		qcom,supply-max-voltage = <880000>;
		qcom,supply-enable-load = <36000>;
		qcom,supply-disable-load = <0>;
		};
		};

		qcom,core-supply-entries {
		#address-cells = <1>;
		#size-cells = <0>;

		qcom,core-supply-entry@0 {
		reg = <0>;
		qcom,supply-name = "refgen";
		qcom,supply-min-voltage = <0>;
		qcom,supply-max-voltage = <0>;
		qcom,supply-enable-load = <0>;
		qcom,supply-disable-load = <0>;
		};
		};
		};


		mdss_dsi_phy0: qcom,mdss_dsi_phy0 {
		compatible = "qcom,dsi-phy-v4.1";
		label = "dsi-phy-0";