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Commit 2b5af0e0 authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Open up a register for user mode 



Some user mode applications need access to the register at dword offset
0x0e02 so open it up for read-write.

Change-Id: Ic0dedbad9cb48c69dc5d69784466f9fc64806de5
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 6dd81d1e

drivers/gpu/msm/adreno-gpulist.h

+40 −38
Original line number Diff line number Diff line
@@ -747,24 +747,25 @@ static const struct a6xx_protected_regs a630_protected_regs[] = { 
	{ A6XX_CP_PROTECT_REG + 9, 0x008d0, 0x0098c, 0 },

	{ A6XX_CP_PROTECT_REG + 10, 0x00900, 0x0094d, 1 },

	{ A6XX_CP_PROTECT_REG + 11, 0x0098d, 0x00bff, 1 },

	{ A6XX_CP_PROTECT_REG + 12, 0x00e00, 0x00e0f, 1 },

	{ A6XX_CP_PROTECT_REG + 13, 0x03c00, 0x03cc3, 1 },

	{ A6XX_CP_PROTECT_REG + 14, 0x03cc4, 0x05cc3, 0 },

	{ A6XX_CP_PROTECT_REG + 15, 0x08630, 0x087ff, 1 },

	{ A6XX_CP_PROTECT_REG + 16, 0x08e00, 0x08e00, 1 },

	{ A6XX_CP_PROTECT_REG + 17, 0x08e08, 0x08e08, 1 },

	{ A6XX_CP_PROTECT_REG + 18, 0x08e50, 0x08e6f, 1 },

	{ A6XX_CP_PROTECT_REG + 19, 0x09624, 0x097ff, 1 },

	{ A6XX_CP_PROTECT_REG + 20, 0x09e70, 0x09e71, 1 },

	{ A6XX_CP_PROTECT_REG + 21, 0x09e78, 0x09fff, 1 },

	{ A6XX_CP_PROTECT_REG + 22, 0x0a630, 0x0a7ff, 1 },

	{ A6XX_CP_PROTECT_REG + 23, 0x0ae02, 0x0ae02, 1 },

	{ A6XX_CP_PROTECT_REG + 24, 0x0ae50, 0x0b17f, 1 },

	{ A6XX_CP_PROTECT_REG + 25, 0x0b604, 0x0b604, 1 },

	{ A6XX_CP_PROTECT_REG + 26, 0x0be02, 0x0be03, 1 },

	{ A6XX_CP_PROTECT_REG + 27, 0x0be20, 0x0de1f, 1 },

	{ A6XX_CP_PROTECT_REG + 28, 0x0f000, 0x0fbff, 1 },

	{ A6XX_CP_PROTECT_REG + 29, 0x0fc00, 0x11bff, 0 },

	{ A6XX_CP_PROTECT_REG + 12, 0x00e00, 0x00e01, 1 },

	{ A6XX_CP_PROTECT_REG + 13, 0x00e03, 0x00e0f, 1 },

	{ A6XX_CP_PROTECT_REG + 14, 0x03c00, 0x03cc3, 1 },

	{ A6XX_CP_PROTECT_REG + 15, 0x03cc4, 0x05cc3, 0 },

	{ A6XX_CP_PROTECT_REG + 16, 0x08630, 0x087ff, 1 },

	{ A6XX_CP_PROTECT_REG + 17, 0x08e00, 0x08e00, 1 },

	{ A6XX_CP_PROTECT_REG + 18, 0x08e08, 0x08e08, 1 },

	{ A6XX_CP_PROTECT_REG + 19, 0x08e50, 0x08e6f, 1 },

	{ A6XX_CP_PROTECT_REG + 20, 0x09624, 0x097ff, 1 },

	{ A6XX_CP_PROTECT_REG + 21, 0x09e70, 0x09e71, 1 },

	{ A6XX_CP_PROTECT_REG + 22, 0x09e78, 0x09fff, 1 },

	{ A6XX_CP_PROTECT_REG + 23, 0x0a630, 0x0a7ff, 1 },

	{ A6XX_CP_PROTECT_REG + 24, 0x0ae02, 0x0ae02, 1 },

	{ A6XX_CP_PROTECT_REG + 25, 0x0ae50, 0x0b17f, 1 },

	{ A6XX_CP_PROTECT_REG + 26, 0x0b604, 0x0b604, 1 },

	{ A6XX_CP_PROTECT_REG + 27, 0x0be02, 0x0be03, 1 },

	{ A6XX_CP_PROTECT_REG + 28, 0x0be20, 0x0d5ff, 1 },

	{ A6XX_CP_PROTECT_REG + 29, 0x0f000, 0x0fbff, 1 },

	{ A6XX_CP_PROTECT_REG + 30, 0x0fc00, 0x11bff, 0 },

	{ A6XX_CP_PROTECT_REG + 31, 0x11c00, 0x00000, 1 },

	{ 0 },

};
@@ -997,26 +998,27 @@ static const struct a6xx_protected_regs a620_protected_regs[] = { 
	{ A6XX_CP_PROTECT_REG + 9, 0x008d0, 0x0098c, 0 },

	{ A6XX_CP_PROTECT_REG + 10, 0x00900, 0x0094d, 1 },

	{ A6XX_CP_PROTECT_REG + 11, 0x0098d, 0x00bff, 1 },

	{ A6XX_CP_PROTECT_REG + 12, 0x00e00, 0x00e0f, 1 },

	{ A6XX_CP_PROTECT_REG + 13, 0x03c00, 0x03cc3, 1 },

	{ A6XX_CP_PROTECT_REG + 14, 0x03cc4, 0x05cc3, 0 },

	{ A6XX_CP_PROTECT_REG + 15, 0x08630, 0x087ff, 1 },

	{ A6XX_CP_PROTECT_REG + 16, 0x08e00, 0x08e00, 1 },

	{ A6XX_CP_PROTECT_REG + 17, 0x08e08, 0x08e08, 1 },

	{ A6XX_CP_PROTECT_REG + 18, 0x08e50, 0x08e6f, 1 },

	{ A6XX_CP_PROTECT_REG + 19, 0x08e80, 0x090ff, 1 },

	{ A6XX_CP_PROTECT_REG + 20, 0x09624, 0x097ff, 1 },

	{ A6XX_CP_PROTECT_REG + 21, 0x09e60, 0x09e71, 1 },

	{ A6XX_CP_PROTECT_REG + 22, 0x09e78, 0x09fff, 1 },

	{ A6XX_CP_PROTECT_REG + 23, 0x0a630, 0x0a7ff, 1 },

	{ A6XX_CP_PROTECT_REG + 24, 0x0ae02, 0x0ae02, 1 },

	{ A6XX_CP_PROTECT_REG + 25, 0x0ae50, 0x0b17f, 1 },

	{ A6XX_CP_PROTECT_REG + 26, 0x0b604, 0x0b604, 1 },

	{ A6XX_CP_PROTECT_REG + 27, 0x0b608, 0x0b60f, 1 },

	{ A6XX_CP_PROTECT_REG + 28, 0x0be02, 0x0be03, 1 },

	{ A6XX_CP_PROTECT_REG + 29, 0x0be20, 0x0de1f, 1 },

	{ A6XX_CP_PROTECT_REG + 30, 0x0f000, 0x0fbff, 1 },

	{ A6XX_CP_PROTECT_REG + 31, 0x0fc00, 0x11bff, 0 },

	{ A6XX_CP_PROTECT_REG + 12, 0x00e00, 0x00e01, 1 },

	{ A6XX_CP_PROTECT_REG + 13, 0x00e03, 0x00e0f, 1 },

	{ A6XX_CP_PROTECT_REG + 14, 0x03c00, 0x03cc3, 1 },

	{ A6XX_CP_PROTECT_REG + 15, 0x03cc4, 0x05cc3, 0 },

	{ A6XX_CP_PROTECT_REG + 16, 0x08630, 0x087ff, 1 },

	{ A6XX_CP_PROTECT_REG + 17, 0x08e00, 0x08e00, 1 },

	{ A6XX_CP_PROTECT_REG + 18, 0x08e08, 0x08e08, 1 },

	{ A6XX_CP_PROTECT_REG + 19, 0x08e50, 0x08e6f, 1 },

	{ A6XX_CP_PROTECT_REG + 20, 0x08e80, 0x090ff, 1 },

	{ A6XX_CP_PROTECT_REG + 21, 0x09624, 0x097ff, 1 },

	{ A6XX_CP_PROTECT_REG + 22, 0x09e60, 0x09e71, 1 },

	{ A6XX_CP_PROTECT_REG + 23, 0x09e78, 0x09fff, 1 },

	{ A6XX_CP_PROTECT_REG + 24, 0x0a630, 0x0a7ff, 1 },

	{ A6XX_CP_PROTECT_REG + 25, 0x0ae02, 0x0ae02, 1 },

	{ A6XX_CP_PROTECT_REG + 26, 0x0ae50, 0x0b17f, 1 },

	{ A6XX_CP_PROTECT_REG + 27, 0x0b604, 0x0b604, 1 },

	{ A6XX_CP_PROTECT_REG + 28, 0x0b608, 0x0b60f, 1 },

	{ A6XX_CP_PROTECT_REG + 29, 0x0be02, 0x0be03, 1 },

	{ A6XX_CP_PROTECT_REG + 30, 0x0be20, 0x0d5ff, 1 },

	{ A6XX_CP_PROTECT_REG + 31, 0x0f000, 0x0fbff, 1 },

	{ A6XX_CP_PROTECT_REG + 32, 0x0fc00, 0x11bff, 0 },

	{ A6XX_CP_PROTECT_REG + 47, 0x11c00, 0x00000, 1 },

	{ 0 },

};