Merge tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Required properties for iomux controller:

- compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"

		or "atmel,sama5d3-pinctrl"

- atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be

  configured in this periph mode. All the periph and bank need to be describe.

  PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...

Bits used for CONFIG:

PULL_UP		(1 << 0): indicate this pin need a pull up.

MULTIDRIVE	(1 << 1): indicate this pin need to be configured as multidrive.

DEGLITCH	(1 << 2): indicate this pin need deglitch.

PULL_DOWN	(1 << 3): indicate this pin need a pull down.

DIS_SCHMIT	(1 << 4): indicate this pin need to disable schmit trigger.

DEBOUNCE	(1 << 16): indicate this pin need debounce.

DEBOUNCE_VAL	(0x3fff << 17): debounce val.

PULL_UP		(1 << 0): indicate this pin needs a pull up.

MULTIDRIVE	(1 << 1): indicate this pin needs to be configured as multi-drive.

			Multi-drive is equivalent to open-drain type output.

DEGLITCH	(1 << 2): indicate this pin needs deglitch.

PULL_DOWN	(1 << 3): indicate this pin needs a pull down.

DIS_SCHMIT	(1 << 4): indicate this pin needs to the disable schmitt trigger.

DRIVE_STRENGTH (3 << 5): indicate the drive strength of the pin using the

			following values:

				00 - No change (reset state value kept)

				01 - Low

				10 - Medium

				11 - High

DEBOUNCE	(1 << 16): indicate this pin needs debounce.

DEBOUNCE_VAL	(0x3fff << 17): debounce value.

NOTE:

Some requirements for using atmel,at91rm9200-pinctrl binding:

- reg: Should contain a list of base address and size pairs for:

    -- first entry - the drive strength and pad control registers.

    -- second entry - the pinmux registers

    -- third entry - the MIPI_PAD_CTRL register

Tegra124 adds the following optional properties for pin configuration subnodes.

The macros for options are defined in the

    dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,

    gmh, owr, uda, gpv, dev3, cec, usb_vbus_en, ao3, ao0, hv0, sdio4, ao4.

  MIPI pad control groups:

    These support only the nvidia,function property.

    dsi_b

Valid values for nvidia,functions are:

  blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,

  sdmmc4, soc, spdif, spi1, spi2, spi3, spi4, spi5, spi6, trace, uarta,

  uartb, uartc, uartd, ulpi, usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,

  vi, vi_alt1, vi_alt3, vimclk2, vimclk2_alt, sata, ccla, pe0, pe, pe1,

  dp, rtck, sys, clk tmds.

  dp, rtck, sys, clk tmds, csi, dsi_b

Example:

	pinmux: pinmux {

		compatible = "nvidia,tegra124-pinmux";

		reg = <0x70000868 0x164		/* Pad control registers */

		       0x70003000 0x434>;	/* PinMux registers */

		reg = <0x0 0x70000868 0x0 0x164>, /* Pad control registers */

		      <0x0 0x70003000 0x0 0x434>, /* Mux registers */

		      <0x0 0x70000820 0x0 0x8>;   /* MIPI pad control */

	};

Example pinmux entries:

nodes, is again defined entirely by the binding for the individual pin

controller device.

== Generic pin multiplexing node content ==

pin multiplexing nodes:

function		- the mux function to select

groups			- the list of groups to select with this function

Example:

state_0_node_a {

	function = "uart0";

	groups = "u0rxtx", "u0rtscts";

};

state_1_node_a {

	function = "spi0";

	groups = "spi0pins";

};

== Generic pin configuration node content ==

Many data items that are represented in a pin configuration node are common

Supported generic properties are:

pins			- the list of pins that properties in the node

			  apply to

function		- the mux function to select

			  apply to (either this or "group" has to be

			  specified)

group			- the group to apply the properties to, if the driver

			  supports configuration of whole groups rather than

			  individual pins (either this or "pins" has to be

			  specified)

bias-disable		- disable any pin bias

bias-high-impedance	- high impedance mode ("third-state", "floating")

bias-bus-hold		- latch weakly

output-high		- set the pin to output mode with high level

slew-rate		- set the slew rate

For example:

state_0_node_a {

	pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */

	bias-pull-up;

};

state_1_node_a {

	pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */

	output-high;

};

state_2_node_a {

	group = "foo-group";

	bias-pull-up;

};

Some of the generic properties take arguments. For those that do, the

arguments are described below.

  binding for the hardware defines:

  - Whether the entries are integers or strings, and their meaning.

- function takes a list of function names/IDs as a required argument. The

  specific binding for the hardware defines:

  - Whether the entries are integers or strings, and their meaning.

  - Whether only a single entry is allowed (which is applied to all entries

    in the pins property), or whether there may alternatively be one entry per

    entry in the pins property, in which case the list lengths must match, and

    for each list index i, the function at list index i is applied to the pin

    at list index i.

- bias-pull-up, -down and -pin-default take as optional argument on hardware

  supporting it the pull strength in Ohm. bias-disable will disable the pull.

  gsbi4_cam_i2c, gsbi5, gsbi5_spi_cs1, gsbi5_spi_cs2, gsbi5_spi_cs3, gsbi6,

  gsbi6_spi_cs1, gsbi6_spi_cs2, gsbi6_spi_cs3, gsbi7, gsbi7_spi_cs1,

  gsbi7_spi_cs2, gsbi7_spi_cs3, gsbi_cam_i2c, hdmi, mi2s, riva_bt, riva_fm,

  riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic,

  riva_wlan, sdc2, sdc4, slimbus, spkr_i2s, tsif1, tsif2, usb2_hsic, ps_hold

Example:

Qualcomm APQ8084 TLMM block

This binding describes the Top Level Mode Multiplexer block found in the

MSM8960 platform.

- compatible:

	Usage: required

	Value type: <string>

	Definition: must be "qcom,apq8084-pinctrl"

- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: the base address and size of the TLMM register space.

- interrupts:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: should specify the TLMM summary IRQ.

- interrupt-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as an interrupt controller

- #interrupt-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/interrupt-controller/irq.h>

- gpio-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as a gpio controller

- #gpio-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/gpio/gpio.h>

Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for

a general description of GPIO and interrupt bindings.

Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".

The pin configuration nodes act as a container for an abitrary number of

subnodes. Each of these subnodes represents some desired configuration for a

pin, a group, or a list of pins or groups. This configuration can include the

mux function to select on those pin(s)/group(s), and various pin configuration

parameters, such as pull-up, drive strength, etc.

PIN CONFIGURATION NODES:

The name of each subnode is not important; all subnodes should be enumerated

and processed purely based on their content.

Each subnode only affects those parameters that are explicitly listed. In

other words, a subnode that lists a mux function but no pin configuration

parameters implies no information about any pin configuration parameters.

Similarly, a pin subnode that describes a pullup parameter implies no

information about e.g. the mux function.

The following generic properties as defined in pinctrl-bindings.txt are valid

to specify in a pin configuration subnode:

- pins:

	Usage: required

	Value type: <string-array>

	Definition: List of gpio pins affected by the properties specified in

		    this subnode.  Valid pins are:

		    gpio0-gpio146,

		    sdc1_clk,

		    sdc1_cmd,

		    sdc1_data

		    sdc2_clk,

		    sdc2_cmd,

		    sdc2_data

- function:

	Usage: required

	Value type: <string>

	Definition: Specify the alternative function to be configured for the

		    specified pins. Functions are only valid for gpio pins.

		    Valid values are:

		    adsp_ext, audio_ref, blsp_i2c1, blsp_i2c2, blsp_i2c3,

		    blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8,

		    blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12,

		    blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5,

		    blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9, blsp_spi10,

		    blsp_spi11, blsp_spi12, blsp_uart1, blsp_uart2, blsp_uart3,

		    blsp_uart4, blsp_uart5, blsp_uart6, blsp_uart7, blsp_uart8,

		    blsp_uart9, blsp_uart10, blsp_uart11, blsp_uart12,

		    blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim4, blsp_uim5,

		    blsp_uim6, blsp_uim7, blsp_uim8, blsp_uim9, blsp_uim10,

		    blsp_uim11, blsp_uim12, cam_mclk0, cam_mclk1, cam_mclk2,

		    cam_mclk3, cci_async, cci_async_in0, cci_i2c0, cci_i2c1,

		    cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,

		    edp_hpd, gcc_gp1, gcc_gp2, gcc_gp3, gcc_obt, gcc_vtt,i

		    gp_mn, gp_pdm0, gp_pdm1, gp_pdm2, gp0_clk, gp1_clk, gpio,

		    hdmi_cec, hdmi_ddc, hdmi_dtest, hdmi_hpd, hdmi_rcv, hsic,

		    ldo_en, ldo_update, mdp_vsync, pci_e0, pci_e0_n, pci_e0_rst,

		    pci_e1, pci_e1_rst, pci_e1_rst_n, pci_e1_clkreq_n, pri_mi2s,

		    qua_mi2s, sata_act, sata_devsleep, sata_devsleep_n,

		    sd_write, sdc_emmc_mode, sdc3, sdc4, sec_mi2s, slimbus,

		    spdif_tx, spkr_i2s, spkr_i2s_ws, spss_geni, ter_mi2s, tsif1,

		    tsif2, uim, uim_batt_alarm

- bias-disable:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as no pull.

- bias-pull-down:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as pull down.

- bias-pull-up:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as pull up.

- output-high:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    high.

		    Not valid for sdc pins.

- output-low:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    low.

		    Not valid for sdc pins.

- drive-strength:

	Usage: optional

	Value type: <u32>

	Definition: Selects the drive strength for the specified pins, in mA.

		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16

Example:

	tlmm: pinctrl@fd510000 {

		compatible = "qcom,apq8084-pinctrl";

		reg = <0xfd510000 0x4000>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		interrupts = <0 208 0>;

		uart2: uart2-default {

			mux {

				pins = "gpio4", "gpio5";

				function = "blsp_uart2";

			};

			tx {

				pins = "gpio4";

				drive-strength = <4>;

				bias-disable;

			};

			rx {

				pins = "gpio5";

				drive-strength = <2>;

				bias-pull-up;

			};

		};

	};