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Commit 2ad95be1 authored by Shivasharan S's avatar Shivasharan S Committed by Greg Kroah-Hartman
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scsi: megaraid_sas: Use 63-bit DMA addressing 



[ Upstream commit 894169db12463cea08d0e2a9e35f42b291340e5a ]

Although MegaRAID controllers support 64-bit DMA addressing, as per
hardware design, DMA address with all 64-bits set
(0xFFFFFFFF-FFFFFFFF) results in a firmware fault.

Driver will set 63-bit DMA mask to ensure the above address will not be
used.

Cc: stable@vger.kernel.org
Signed-off-by: default avatarShivasharan S <shivasharan.srikanteshwara@broadcom.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 3263f786

drivers/scsi/megaraid/megaraid_sas_base.c

+10 −10
Original line number Diff line number Diff line
@@ -6056,13 +6056,13 @@ static int megasas_io_attach(struct megasas_instance *instance) 
 * @instance:		Adapter soft state

 * Description:

 *

 * For Ventura, driver/FW will operate in 64bit DMA addresses.

 * For Ventura, driver/FW will operate in 63bit DMA addresses.

 *

 * For invader-

 *	By default, driver/FW will operate in 32bit DMA addresses

 *	for consistent DMA mapping but if 32 bit consistent

 *	DMA mask fails, driver will try with 64 bit consistent

 *	mask provided FW is true 64bit DMA capable

 *	DMA mask fails, driver will try with 63 bit consistent

 *	mask provided FW is true 63bit DMA capable

 *

 * For older controllers(Thunderbolt and MFI based adapters)-

 *	driver/FW will operate in 32 bit consistent DMA addresses.
@@ -6075,15 +6075,15 @@ megasas_set_dma_mask(struct megasas_instance *instance) 
	u32 scratch_pad_2;



	pdev = instance->pdev;

	consistent_mask = (instance->adapter_type == VENTURA_SERIES) ?

				DMA_BIT_MASK(64) : DMA_BIT_MASK(32);

	consistent_mask = (instance->adapter_type >= VENTURA_SERIES) ?

				DMA_BIT_MASK(63) : DMA_BIT_MASK(32);



	if (IS_DMA64) {

		if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&

		if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(63)) &&

		    dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))

			goto fail_set_dma_mask;



		if ((*pdev->dev.dma_mask == DMA_BIT_MASK(64)) &&

		if ((*pdev->dev.dma_mask == DMA_BIT_MASK(63)) &&

		    (dma_set_coherent_mask(&pdev->dev, consistent_mask) &&

		     dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))) {

			/*
@@ -6096,7 +6096,7 @@ megasas_set_dma_mask(struct megasas_instance *instance) 
			if (!(scratch_pad_2 & MR_CAN_HANDLE_64_BIT_DMA_OFFSET))

				goto fail_set_dma_mask;

			else if (dma_set_mask_and_coherent(&pdev->dev,

							   DMA_BIT_MASK(64)))

							   DMA_BIT_MASK(63)))

				goto fail_set_dma_mask;

		}

	} else if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
@@ -6108,8 +6108,8 @@ megasas_set_dma_mask(struct megasas_instance *instance) 
		instance->consistent_mask_64bit = true;



	dev_info(&pdev->dev, "%s bit DMA mask and %s bit consistent mask\n",

		 ((*pdev->dev.dma_mask == DMA_BIT_MASK(64)) ? "64" : "32"),

		 (instance->consistent_mask_64bit ? "64" : "32"));

		 ((*pdev->dev.dma_mask == DMA_BIT_MASK(64)) ? "63" : "32"),

		 (instance->consistent_mask_64bit ? "63" : "32"));



	return 0;