Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2ac96d2a authored by Pradeep Bhat's avatar Pradeep Bhat Committed by Daniel Vetter
Browse files

drm/i915/skl: Definition of SKL WM param structs for pipe/plane 



This patch defines the structures needed for computation of
watermarks of pipes and planes for SKL.

v2: Incorporated Damien's review comments and removed unused fields
    in structs for future features like rotation, drrs and scaling.
    The skl_wm_values struct is now made more generic across planes
    and cursor planes for all pipes.

v3: implemented the plane/cursor split.

v4: Change the wm union back to a structure (Ville, Daniel)

Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarPradeep Bhat <pradeep.bhat@intel.com>
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent fae1267d

drivers/gpu/drm/i915/i915_drv.h

+18 −0
Original line number Diff line number Diff line
@@ -1387,6 +1387,24 @@ struct ilk_wm_values { 
	enum intel_ddb_partitioning partitioning;

};



struct skl_wm_values {

	bool dirty[I915_MAX_PIPES];

	uint32_t wm_linetime[I915_MAX_PIPES];

	uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];

	uint32_t cursor[I915_MAX_PIPES][8];

	uint32_t plane_trans[I915_MAX_PIPES][I915_MAX_PLANES];

	uint32_t cursor_trans[I915_MAX_PIPES];

};



struct skl_wm_level {

	bool plane_en[I915_MAX_PLANES];

	uint16_t plane_res_b[I915_MAX_PLANES];

	uint8_t plane_res_l[I915_MAX_PLANES];

	bool cursor_en;

	uint16_t cursor_res_b;

	uint8_t cursor_res_l;

};



/*

 * This struct helps tracking the state needed for runtime PM, which puts the

 * device in PCI D3 state. Notice that when this happens, nothing on the

drivers/gpu/drm/i915/intel_drv.h

+8 −0
Original line number Diff line number Diff line
@@ -412,6 +412,12 @@ struct intel_mmio_flip { 
	struct work_struct work;

};



struct skl_pipe_wm {

	struct skl_wm_level wm[8];

	struct skl_wm_level trans_wm;

	uint32_t linetime;

};



struct intel_crtc {

	struct drm_crtc base;

	enum pipe pipe;
@@ -459,6 +465,8 @@ struct intel_crtc { 
	struct {

		/* watermarks currently being used  */

		struct intel_pipe_wm active;

		/* SKL wm values currently in use */

		struct skl_pipe_wm skl_active;

	} wm;



	int scanline_offset;

drivers/gpu/drm/i915/intel_pm.c

+8 −0
Original line number Diff line number Diff line
@@ -1960,6 +1960,14 @@ static uint32_t ilk_wm_fbc(uint32_t pri_val, uint32_t horiz_pixels, 
	return DIV_ROUND_UP(pri_val * 64, horiz_pixels * bytes_per_pixel) + 2;

}



struct skl_pipe_wm_parameters {

	bool active;

	uint32_t pipe_htotal;

	uint32_t pixel_rate; /* in KHz */

	struct intel_plane_wm_parameters plane[I915_MAX_PLANES];

	struct intel_plane_wm_parameters cursor;

};



struct ilk_pipe_wm_parameters {

	bool active;

	uint32_t pipe_htotal;