Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2ab516ad authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper
Browse files

ARM: dts: kirkwood: add pinctrl node to common SoC include



All Kirkwood SoCs have their pinctrl registers at the same address.
Instead of replaying the same reg property on each SoC, have the
reg property set in the common SoC file already. This also allows
us to move common pinctrl settings to this node later on.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: default avatarAndrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.com


Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent a9483969
Loading
Loading
Loading
Loading
+0 −1
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			compatible = "marvell,88f6192-pinctrl";
			reg = <0x10000 0x20>;

			pmx_nand: pmx-nand {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+0 −1
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			compatible = "marvell,88f6281-pinctrl";
			reg = <0x10000 0x20>;

			pmx_nand: pmx-nand {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+0 −1
Original line number Diff line number Diff line
@@ -58,7 +58,6 @@

		pinctrl: pin-controller@10000 {
			compatible = "marvell,88f6282-pinctrl";
			reg = <0x10000 0x20>;

			pmx_nand: pmx-nand {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@
	ocp@f1000000 {
		pinctrl: pin-controller@10000 {
			compatible = "marvell,98dx4122-pinctrl";
			reg = <0x10000 0x20>;

			pmx_nand: pmx-nand {
				marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+5 −0
Original line number Diff line number Diff line
@@ -71,6 +71,11 @@
		#address-cells = <1>;
		#size-cells = <1>;

		pinctrl: pin-controller@10000 {
			/* set compatible property in SoC file */
			reg = <0x10000 0x20>;
		};

		core_clk: core-clocks@10030 {
			compatible = "marvell,kirkwood-core-clock";
			reg = <0x10030 0x4>;