Loading drivers/cam_cdm/cam_cdm.h +1 −1 Original line number Diff line number Diff line Loading @@ -471,7 +471,7 @@ struct cam_cdm_bl_fifo { uint8_t bl_tag; uint32_t bl_depth; uint8_t last_bl_tag_done; uint32_t work_record; atomic_t work_record; }; /** Loading drivers/cam_cdm/cam_cdm_core_common.c +1 −4 Original line number Diff line number Diff line Loading @@ -204,6 +204,7 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw, } else if (status == CAM_CDM_CB_STATUS_HW_RESET_DONE || status == CAM_CDM_CB_STATUS_HW_FLUSH || status == CAM_CDM_CB_STATUS_HW_RESUBMIT || status == CAM_CDM_CB_STATUS_INVALID_BL_CMD || status == CAM_CDM_CB_STATUS_HW_ERROR) { int client_idx; struct cam_cdm_bl_cb_request_entry *node = Loading Loading @@ -798,13 +799,11 @@ int cam_cdm_process_cmd(void *hw_priv, } idx = CAM_CDM_GET_CLIENT_IDX(*handle); mutex_lock(&cdm_hw->hw_mutex); client = core->clients[idx]; if (!client) { CAM_ERR(CAM_CDM, "Client not present for handle %d", *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } Loading @@ -812,12 +811,10 @@ int cam_cdm_process_cmd(void *hw_priv, CAM_ERR(CAM_CDM, "handle mismatch, client handle %d index %d received handle %d", client->handle, idx, *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } rc = cam_hw_cdm_hang_detect(cdm_hw, *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } default: Loading drivers/cam_cdm/cam_cdm_hw_core.c +152 −123 Original line number Diff line number Diff line Loading @@ -1056,7 +1056,8 @@ static void cam_hw_cdm_reset_cleanup( struct cam_cdm_bl_cb_request_entry *node, *tnode; bool flush_hw = false; if (test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status)) if (test_bit(CAM_CDM_ERROR_HW_STATUS, &core->cdm_status) || test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status)) flush_hw = true; for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) { Loading Loading @@ -1084,7 +1085,7 @@ static void cam_hw_cdm_reset_cleanup( } core->bl_fifo[i].bl_tag = 0; core->bl_fifo[i].last_bl_tag_done = -1; core->bl_fifo[i].work_record = 0; atomic_set(&core->bl_fifo[i].work_record, 0); } } Loading @@ -1093,27 +1094,33 @@ static void cam_hw_cdm_work(struct work_struct *work) struct cam_cdm_work_payload *payload; struct cam_hw_info *cdm_hw; struct cam_cdm *core; int i; int i, fifo_idx; struct cam_cdm_bl_cb_request_entry *tnode = NULL; struct cam_cdm_bl_cb_request_entry *node = NULL; payload = container_of(work, struct cam_cdm_work_payload, work); if (payload) { if (!payload) { CAM_ERR(CAM_CDM, "NULL payload"); return; } cdm_hw = payload->hw; core = (struct cam_cdm *)cdm_hw->core_info; if (payload->fifo_idx >= core->offsets->reg_data->num_bl_fifo) { fifo_idx = payload->fifo_idx; if (fifo_idx >= core->offsets->reg_data->num_bl_fifo) { CAM_ERR(CAM_CDM, "Invalid fifo idx %d", payload->fifo_idx); fifo_idx); kfree(payload); payload = NULL; return; } cam_req_mgr_thread_switch_delay_detect( payload->workq_scheduled_ts); CAM_DBG(CAM_CDM, "IRQ status=0x%x", payload->irq_status); if (payload->irq_status & CAM_CDM_IRQ_STATUS_INLINE_IRQ_MASK) { struct cam_cdm_bl_cb_request_entry *node, *tnode; CAM_DBG(CAM_CDM, "inline IRQ data=0x%x last tag: 0x%x", payload->irq_data, core->bl_fifo[payload->fifo_idx] Loading @@ -1126,31 +1133,32 @@ static void cam_hw_cdm_work(struct work_struct *work) return; } mutex_lock(&core->bl_fifo[payload->fifo_idx] mutex_lock(&core->bl_fifo[fifo_idx] .fifo_lock); if (core->bl_fifo[payload->fifo_idx].work_record) core->bl_fifo[payload->fifo_idx].work_record--; if (atomic_read(&core->bl_fifo[fifo_idx].work_record)) atomic_dec( &core->bl_fifo[fifo_idx].work_record); if (list_empty(&core->bl_fifo[payload->fifo_idx] if (list_empty(&core->bl_fifo[fifo_idx] .bl_request_list)) { CAM_INFO(CAM_CDM, "Fifo list empty, idx %d tag %d arb %d", payload->fifo_idx, payload->irq_data, fifo_idx, payload->irq_data, core->arbitration); mutex_unlock(&core->bl_fifo[payload->fifo_idx] mutex_unlock(&core->bl_fifo[fifo_idx] .fifo_lock); return; } if (core->bl_fifo[payload->fifo_idx] if (core->bl_fifo[fifo_idx] .last_bl_tag_done != payload->irq_data) { core->bl_fifo[payload->fifo_idx] core->bl_fifo[fifo_idx] .last_bl_tag_done = payload->irq_data; list_for_each_entry_safe(node, tnode, &core->bl_fifo[payload->fifo_idx] &core->bl_fifo[fifo_idx] .bl_request_list, entry) { if (node->request_type == Loading Loading @@ -1193,6 +1201,8 @@ static void cam_hw_cdm_work(struct work_struct *work) } if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERRORS) { int reset_hw_hdl = 0x0; CAM_ERR_RATE_LIMIT(CAM_CDM, "CDM Error IRQ status %d\n", payload->irq_status); Loading @@ -1207,11 +1217,39 @@ static void cam_hw_cdm_work(struct work_struct *work) */ cam_hw_cdm_pause_core(cdm_hw, true); cam_hw_cdm_dump_core_debug_registers(cdm_hw); if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK) { node = list_first_entry_or_null( &core->bl_fifo[payload->fifo_idx].bl_request_list, struct cam_cdm_bl_cb_request_entry, entry); if (node != NULL) { if (node->request_type == CAM_HW_CDM_BL_CB_CLIENT) { cam_cdm_notify_clients(cdm_hw, CAM_CDM_CB_STATUS_INVALID_BL_CMD, (void *)node); } else if (node->request_type == CAM_HW_CDM_BL_CB_INTERNAL) { CAM_ERR(CAM_CDM, "Invalid node=%pK %d", node, node->request_type); } list_del_init(&node->entry); kfree(node); } } /* Resume CDM back */ cam_hw_cdm_pause_core(cdm_hw, false); for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&core->bl_fifo[i].fifo_lock); if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK) cam_hw_cdm_reset_hw(cdm_hw, reset_hw_hdl); mutex_unlock(&cdm_hw->hw_mutex); if (!(payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK)) Loading @@ -1220,9 +1258,6 @@ static void cam_hw_cdm_work(struct work_struct *work) } kfree(payload); payload = NULL; } else { CAM_ERR(CAM_CDM, "NULL payload"); } } Loading Loading @@ -1256,7 +1291,7 @@ static void cam_hw_cdm_iommu_fault_handler(struct iommu_domain *domain, for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&core->bl_fifo[i].fifo_lock); mutex_unlock(&cdm_hw->hw_mutex); CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK\n", CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK", (void *)iova); cam_cdm_notify_clients(cdm_hw, CAM_CDM_CB_STATUS_PAGEFAULT, (void *)iova); Loading Loading @@ -1345,7 +1380,7 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data) payload[i]->irq_status, cdm_hw->soc_info.index); cdm_core->bl_fifo[i].work_record++; atomic_inc(&cdm_core->bl_fifo[i].work_record); payload[i]->workq_scheduled_ts = ktime_get(); work_status = queue_work( Loading Loading @@ -1653,20 +1688,14 @@ int cam_hw_cdm_hang_detect( cdm_core = (struct cam_cdm *)cdm_hw->core_info; for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) mutex_lock(&cdm_core->bl_fifo[i].fifo_lock); for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) if (cdm_core->bl_fifo[i].work_record) { if (atomic_read(&cdm_core->bl_fifo[i].work_record)) { CAM_WARN(CAM_CDM, "workqueue got delayed, work_record :%u", cdm_core->bl_fifo[i].work_record); atomic_read(&cdm_core->bl_fifo[i].work_record)); rc = 0; break; } for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&cdm_core->bl_fifo[i].fifo_lock); return rc; } Loading Loading @@ -1771,7 +1800,7 @@ int cam_hw_cdm_init(void *hw_priv, } for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) { cdm_core->bl_fifo[i].last_bl_tag_done = -1; cdm_core->bl_fifo[i].work_record = 0; atomic_set(&cdm_core->bl_fifo[i].work_record, 0); } rc = cam_hw_cdm_reset_hw(cdm_hw, reset_hw_hdl); Loading drivers/cam_cdm/cam_cdm_intf_api.h +37 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,8 @@ #include "cam_cdm_util.h" #include "cam_soc_util.h" #define CAM_CDM_BL_CMD_MAX 25 /* enum cam_cdm_id - Enum for possible CAM CDM hardwares */ enum cam_cdm_id { CAM_CDM_VIRTUAL, Loading Loading @@ -150,6 +152,41 @@ struct cam_cdm_bl_request { struct cam_cdm_bl_cmd cmd[1]; }; /** * struct cam_cdm_bl_data - last submiited CDM BL data * * @mem_handle : Input mem handle of bl cmd * @hw_addr : Hw address of submitted Bl command * @offset : Input offset of the actual bl cmd in the memory pointed * by mem_handle * @len : length of submitted Bl command to CDM. * @input_len : Input length of the BL command, Cannot be more than 1MB and * this is will be validated with offset+size of the memory pointed * by mem_handle * @type : CDM bl cmd addr types. */ struct cam_cdm_bl_data { int32_t mem_handle; dma_addr_t hw_addr; uint32_t offset; size_t len; uint32_t input_len; enum cam_cdm_bl_cmd_addr_type type; }; /** * struct cam_cdm_bl_info * * @bl_count : No. of Bl commands submiited to CDM. * @cmd : payload holding the BL cmd's arrary * that is sumbitted. * */ struct cam_cdm_bl_info { int32_t bl_count; struct cam_cdm_bl_data cmd[CAM_CDM_BL_CMD_MAX]; }; /** * @brief : API to get the CDM capabilities for a camera device type * Loading drivers/cam_cdm/cam_cdm_util.c +66 −12 Original line number Diff line number Diff line Loading @@ -689,25 +689,53 @@ int cam_cdm_util_cmd_buf_write(void __iomem **current_device_base, return ret; } static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_dmi_cmd *p_dmi_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_dmi_cmd = (struct cdm_dmi_cmd *)cmd_buf_addr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; CAM_INFO(CAM_CDM, "DMI"); if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "DMI: LEN: %u DMIAddr: 0x%X DMISel: 0x%X LUT_addr: 0x%X", p_dmi_cmd->length, p_dmi_cmd->DMIAddr, p_dmi_cmd->DMISel, p_dmi_cmd->addr); return ret; } static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_indirect_cmd *p_indirect_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_indirect_cmd = (struct cdm_indirect_cmd *)cmd_buf_addr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; CAM_INFO(CAM_CDM, "Buff Indirect"); if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "Buff Indirect: LEN: %u addr: 0x%X", p_indirect_cmd->length, p_indirect_cmd->addr); return ret; } static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_regcontinuous_cmd *p_regcont_cmd; Loading @@ -722,6 +750,12 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) p_regcont_cmd->count, p_regcont_cmd->offset); for (i = 0; i < p_regcont_cmd->count; i++) { if (temp_ptr > cmd_buf_addr_end) { CAM_ERR(CAM_CDM, "Invalid cmd(%d) start addr:%pK end addr:%pK", i, temp_ptr, cmd_buf_addr_end); break; } CAM_INFO(CAM_CDM, "DATA_%d: 0x%X", i, *temp_ptr); temp_ptr++; Loading @@ -731,7 +765,8 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) return ret; } static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { struct cdm_regrandom_cmd *p_regrand_cmd; uint32_t *temp_ptr = cmd_buf_addr; Loading @@ -746,6 +781,12 @@ static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) p_regrand_cmd->count); for (i = 0; i < p_regrand_cmd->count; i++) { if (temp_ptr > cmd_buf_addr_end) { CAM_ERR(CAM_CDM, "Invalid cmd(%d) start addr:%pK end addr:%pK", i, temp_ptr, cmd_buf_addr_end); break; } CAM_INFO(CAM_CDM, "OFFSET_%d: 0x%X DATA_%d: 0x%X", i, *temp_ptr & CAM_CDM_REG_OFFSET_MASK, i, *(temp_ptr + 1)); Loading Loading @@ -778,15 +819,22 @@ static long cam_cdm_util_dump_wait_event_cmd(uint32_t *cmd_buf_addr) return ret; } static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_changebase_cmd *p_cbase_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_cbase_cmd = (struct cdm_changebase_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "CHANGE_BASE: 0x%X", p_cbase_cmd->base); Loading @@ -808,6 +856,7 @@ void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buf_start, uint32_t *cmd_buf_end) { uint32_t *buf_now = cmd_buf_start; uint32_t *buf_end = cmd_buf_end; uint32_t cmd = 0; if (!cmd_buf_start || !cmd_buf_end) { Loading @@ -823,16 +872,20 @@ void cam_cdm_util_dump_cmd_buf( case CAM_CDM_CMD_DMI: case CAM_CDM_CMD_DMI_32: case CAM_CDM_CMD_DMI_64: buf_now += cam_cdm_util_dump_dmi_cmd(buf_now); buf_now += cam_cdm_util_dump_dmi_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_REG_CONT: buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now); buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_REG_RANDOM: buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now); buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_BUFF_INDIRECT: buf_now += cam_cdm_util_dump_buff_indirect(buf_now); buf_now += cam_cdm_util_dump_buff_indirect(buf_now, buf_end); break; case CAM_CDM_CMD_GEN_IRQ: buf_now += cam_cdm_util_dump_gen_irq_cmd(buf_now); Loading @@ -841,7 +894,8 @@ void cam_cdm_util_dump_cmd_buf( buf_now += cam_cdm_util_dump_wait_event_cmd(buf_now); break; case CAM_CDM_CMD_CHANGE_BASE: buf_now += cam_cdm_util_dump_change_base_cmd(buf_now); buf_now += cam_cdm_util_dump_change_base_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_PERF_CTRL: buf_now += cam_cdm_util_dump_perf_ctrl_cmd(buf_now); Loading Loading
drivers/cam_cdm/cam_cdm.h +1 −1 Original line number Diff line number Diff line Loading @@ -471,7 +471,7 @@ struct cam_cdm_bl_fifo { uint8_t bl_tag; uint32_t bl_depth; uint8_t last_bl_tag_done; uint32_t work_record; atomic_t work_record; }; /** Loading
drivers/cam_cdm/cam_cdm_core_common.c +1 −4 Original line number Diff line number Diff line Loading @@ -204,6 +204,7 @@ void cam_cdm_notify_clients(struct cam_hw_info *cdm_hw, } else if (status == CAM_CDM_CB_STATUS_HW_RESET_DONE || status == CAM_CDM_CB_STATUS_HW_FLUSH || status == CAM_CDM_CB_STATUS_HW_RESUBMIT || status == CAM_CDM_CB_STATUS_INVALID_BL_CMD || status == CAM_CDM_CB_STATUS_HW_ERROR) { int client_idx; struct cam_cdm_bl_cb_request_entry *node = Loading Loading @@ -798,13 +799,11 @@ int cam_cdm_process_cmd(void *hw_priv, } idx = CAM_CDM_GET_CLIENT_IDX(*handle); mutex_lock(&cdm_hw->hw_mutex); client = core->clients[idx]; if (!client) { CAM_ERR(CAM_CDM, "Client not present for handle %d", *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } Loading @@ -812,12 +811,10 @@ int cam_cdm_process_cmd(void *hw_priv, CAM_ERR(CAM_CDM, "handle mismatch, client handle %d index %d received handle %d", client->handle, idx, *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } rc = cam_hw_cdm_hang_detect(cdm_hw, *handle); mutex_unlock(&cdm_hw->hw_mutex); break; } default: Loading
drivers/cam_cdm/cam_cdm_hw_core.c +152 −123 Original line number Diff line number Diff line Loading @@ -1056,7 +1056,8 @@ static void cam_hw_cdm_reset_cleanup( struct cam_cdm_bl_cb_request_entry *node, *tnode; bool flush_hw = false; if (test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status)) if (test_bit(CAM_CDM_ERROR_HW_STATUS, &core->cdm_status) || test_bit(CAM_CDM_FLUSH_HW_STATUS, &core->cdm_status)) flush_hw = true; for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) { Loading Loading @@ -1084,7 +1085,7 @@ static void cam_hw_cdm_reset_cleanup( } core->bl_fifo[i].bl_tag = 0; core->bl_fifo[i].last_bl_tag_done = -1; core->bl_fifo[i].work_record = 0; atomic_set(&core->bl_fifo[i].work_record, 0); } } Loading @@ -1093,27 +1094,33 @@ static void cam_hw_cdm_work(struct work_struct *work) struct cam_cdm_work_payload *payload; struct cam_hw_info *cdm_hw; struct cam_cdm *core; int i; int i, fifo_idx; struct cam_cdm_bl_cb_request_entry *tnode = NULL; struct cam_cdm_bl_cb_request_entry *node = NULL; payload = container_of(work, struct cam_cdm_work_payload, work); if (payload) { if (!payload) { CAM_ERR(CAM_CDM, "NULL payload"); return; } cdm_hw = payload->hw; core = (struct cam_cdm *)cdm_hw->core_info; if (payload->fifo_idx >= core->offsets->reg_data->num_bl_fifo) { fifo_idx = payload->fifo_idx; if (fifo_idx >= core->offsets->reg_data->num_bl_fifo) { CAM_ERR(CAM_CDM, "Invalid fifo idx %d", payload->fifo_idx); fifo_idx); kfree(payload); payload = NULL; return; } cam_req_mgr_thread_switch_delay_detect( payload->workq_scheduled_ts); CAM_DBG(CAM_CDM, "IRQ status=0x%x", payload->irq_status); if (payload->irq_status & CAM_CDM_IRQ_STATUS_INLINE_IRQ_MASK) { struct cam_cdm_bl_cb_request_entry *node, *tnode; CAM_DBG(CAM_CDM, "inline IRQ data=0x%x last tag: 0x%x", payload->irq_data, core->bl_fifo[payload->fifo_idx] Loading @@ -1126,31 +1133,32 @@ static void cam_hw_cdm_work(struct work_struct *work) return; } mutex_lock(&core->bl_fifo[payload->fifo_idx] mutex_lock(&core->bl_fifo[fifo_idx] .fifo_lock); if (core->bl_fifo[payload->fifo_idx].work_record) core->bl_fifo[payload->fifo_idx].work_record--; if (atomic_read(&core->bl_fifo[fifo_idx].work_record)) atomic_dec( &core->bl_fifo[fifo_idx].work_record); if (list_empty(&core->bl_fifo[payload->fifo_idx] if (list_empty(&core->bl_fifo[fifo_idx] .bl_request_list)) { CAM_INFO(CAM_CDM, "Fifo list empty, idx %d tag %d arb %d", payload->fifo_idx, payload->irq_data, fifo_idx, payload->irq_data, core->arbitration); mutex_unlock(&core->bl_fifo[payload->fifo_idx] mutex_unlock(&core->bl_fifo[fifo_idx] .fifo_lock); return; } if (core->bl_fifo[payload->fifo_idx] if (core->bl_fifo[fifo_idx] .last_bl_tag_done != payload->irq_data) { core->bl_fifo[payload->fifo_idx] core->bl_fifo[fifo_idx] .last_bl_tag_done = payload->irq_data; list_for_each_entry_safe(node, tnode, &core->bl_fifo[payload->fifo_idx] &core->bl_fifo[fifo_idx] .bl_request_list, entry) { if (node->request_type == Loading Loading @@ -1193,6 +1201,8 @@ static void cam_hw_cdm_work(struct work_struct *work) } if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERRORS) { int reset_hw_hdl = 0x0; CAM_ERR_RATE_LIMIT(CAM_CDM, "CDM Error IRQ status %d\n", payload->irq_status); Loading @@ -1207,11 +1217,39 @@ static void cam_hw_cdm_work(struct work_struct *work) */ cam_hw_cdm_pause_core(cdm_hw, true); cam_hw_cdm_dump_core_debug_registers(cdm_hw); if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK) { node = list_first_entry_or_null( &core->bl_fifo[payload->fifo_idx].bl_request_list, struct cam_cdm_bl_cb_request_entry, entry); if (node != NULL) { if (node->request_type == CAM_HW_CDM_BL_CB_CLIENT) { cam_cdm_notify_clients(cdm_hw, CAM_CDM_CB_STATUS_INVALID_BL_CMD, (void *)node); } else if (node->request_type == CAM_HW_CDM_BL_CB_INTERNAL) { CAM_ERR(CAM_CDM, "Invalid node=%pK %d", node, node->request_type); } list_del_init(&node->entry); kfree(node); } } /* Resume CDM back */ cam_hw_cdm_pause_core(cdm_hw, false); for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&core->bl_fifo[i].fifo_lock); if (payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK) cam_hw_cdm_reset_hw(cdm_hw, reset_hw_hdl); mutex_unlock(&cdm_hw->hw_mutex); if (!(payload->irq_status & CAM_CDM_IRQ_STATUS_ERROR_INV_CMD_MASK)) Loading @@ -1220,9 +1258,6 @@ static void cam_hw_cdm_work(struct work_struct *work) } kfree(payload); payload = NULL; } else { CAM_ERR(CAM_CDM, "NULL payload"); } } Loading Loading @@ -1256,7 +1291,7 @@ static void cam_hw_cdm_iommu_fault_handler(struct iommu_domain *domain, for (i = 0; i < core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&core->bl_fifo[i].fifo_lock); mutex_unlock(&cdm_hw->hw_mutex); CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK\n", CAM_ERR_RATE_LIMIT(CAM_CDM, "Page fault iova addr %pK", (void *)iova); cam_cdm_notify_clients(cdm_hw, CAM_CDM_CB_STATUS_PAGEFAULT, (void *)iova); Loading Loading @@ -1345,7 +1380,7 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data) payload[i]->irq_status, cdm_hw->soc_info.index); cdm_core->bl_fifo[i].work_record++; atomic_inc(&cdm_core->bl_fifo[i].work_record); payload[i]->workq_scheduled_ts = ktime_get(); work_status = queue_work( Loading Loading @@ -1653,20 +1688,14 @@ int cam_hw_cdm_hang_detect( cdm_core = (struct cam_cdm *)cdm_hw->core_info; for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) mutex_lock(&cdm_core->bl_fifo[i].fifo_lock); for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) if (cdm_core->bl_fifo[i].work_record) { if (atomic_read(&cdm_core->bl_fifo[i].work_record)) { CAM_WARN(CAM_CDM, "workqueue got delayed, work_record :%u", cdm_core->bl_fifo[i].work_record); atomic_read(&cdm_core->bl_fifo[i].work_record)); rc = 0; break; } for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) mutex_unlock(&cdm_core->bl_fifo[i].fifo_lock); return rc; } Loading Loading @@ -1771,7 +1800,7 @@ int cam_hw_cdm_init(void *hw_priv, } for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo; i++) { cdm_core->bl_fifo[i].last_bl_tag_done = -1; cdm_core->bl_fifo[i].work_record = 0; atomic_set(&cdm_core->bl_fifo[i].work_record, 0); } rc = cam_hw_cdm_reset_hw(cdm_hw, reset_hw_hdl); Loading
drivers/cam_cdm/cam_cdm_intf_api.h +37 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,8 @@ #include "cam_cdm_util.h" #include "cam_soc_util.h" #define CAM_CDM_BL_CMD_MAX 25 /* enum cam_cdm_id - Enum for possible CAM CDM hardwares */ enum cam_cdm_id { CAM_CDM_VIRTUAL, Loading Loading @@ -150,6 +152,41 @@ struct cam_cdm_bl_request { struct cam_cdm_bl_cmd cmd[1]; }; /** * struct cam_cdm_bl_data - last submiited CDM BL data * * @mem_handle : Input mem handle of bl cmd * @hw_addr : Hw address of submitted Bl command * @offset : Input offset of the actual bl cmd in the memory pointed * by mem_handle * @len : length of submitted Bl command to CDM. * @input_len : Input length of the BL command, Cannot be more than 1MB and * this is will be validated with offset+size of the memory pointed * by mem_handle * @type : CDM bl cmd addr types. */ struct cam_cdm_bl_data { int32_t mem_handle; dma_addr_t hw_addr; uint32_t offset; size_t len; uint32_t input_len; enum cam_cdm_bl_cmd_addr_type type; }; /** * struct cam_cdm_bl_info * * @bl_count : No. of Bl commands submiited to CDM. * @cmd : payload holding the BL cmd's arrary * that is sumbitted. * */ struct cam_cdm_bl_info { int32_t bl_count; struct cam_cdm_bl_data cmd[CAM_CDM_BL_CMD_MAX]; }; /** * @brief : API to get the CDM capabilities for a camera device type * Loading
drivers/cam_cdm/cam_cdm_util.c +66 −12 Original line number Diff line number Diff line Loading @@ -689,25 +689,53 @@ int cam_cdm_util_cmd_buf_write(void __iomem **current_device_base, return ret; } static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_dmi_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_dmi_cmd *p_dmi_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_dmi_cmd = (struct cdm_dmi_cmd *)cmd_buf_addr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_DMI]; CAM_INFO(CAM_CDM, "DMI"); if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "DMI: LEN: %u DMIAddr: 0x%X DMISel: 0x%X LUT_addr: 0x%X", p_dmi_cmd->length, p_dmi_cmd->DMIAddr, p_dmi_cmd->DMISel, p_dmi_cmd->addr); return ret; } static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_buff_indirect(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_indirect_cmd *p_indirect_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_indirect_cmd = (struct cdm_indirect_cmd *)cmd_buf_addr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_BUFF_INDIRECT]; CAM_INFO(CAM_CDM, "Buff Indirect"); if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "Buff Indirect: LEN: %u addr: 0x%X", p_indirect_cmd->length, p_indirect_cmd->addr); return ret; } static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_regcontinuous_cmd *p_regcont_cmd; Loading @@ -722,6 +750,12 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) p_regcont_cmd->count, p_regcont_cmd->offset); for (i = 0; i < p_regcont_cmd->count; i++) { if (temp_ptr > cmd_buf_addr_end) { CAM_ERR(CAM_CDM, "Invalid cmd(%d) start addr:%pK end addr:%pK", i, temp_ptr, cmd_buf_addr_end); break; } CAM_INFO(CAM_CDM, "DATA_%d: 0x%X", i, *temp_ptr); temp_ptr++; Loading @@ -731,7 +765,8 @@ static long cam_cdm_util_dump_reg_cont_cmd(uint32_t *cmd_buf_addr) return ret; } static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { struct cdm_regrandom_cmd *p_regrand_cmd; uint32_t *temp_ptr = cmd_buf_addr; Loading @@ -746,6 +781,12 @@ static long cam_cdm_util_dump_reg_random_cmd(uint32_t *cmd_buf_addr) p_regrand_cmd->count); for (i = 0; i < p_regrand_cmd->count; i++) { if (temp_ptr > cmd_buf_addr_end) { CAM_ERR(CAM_CDM, "Invalid cmd(%d) start addr:%pK end addr:%pK", i, temp_ptr, cmd_buf_addr_end); break; } CAM_INFO(CAM_CDM, "OFFSET_%d: 0x%X DATA_%d: 0x%X", i, *temp_ptr & CAM_CDM_REG_OFFSET_MASK, i, *(temp_ptr + 1)); Loading Loading @@ -778,15 +819,22 @@ static long cam_cdm_util_dump_wait_event_cmd(uint32_t *cmd_buf_addr) return ret; } static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr) static long cam_cdm_util_dump_change_base_cmd(uint32_t *cmd_buf_addr, uint32_t *cmd_buf_addr_end) { long ret = 0; struct cdm_changebase_cmd *p_cbase_cmd; uint32_t *temp_ptr = cmd_buf_addr; p_cbase_cmd = (struct cdm_changebase_cmd *)temp_ptr; temp_ptr += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; ret += CDMCmdHeaderSizes[CAM_CDM_CMD_CHANGE_BASE]; if (temp_ptr > cmd_buf_addr_end) CAM_ERR(CAM_CDM, "Invalid cmd start addr:%pK end addr:%pK", temp_ptr, cmd_buf_addr_end); CAM_INFO(CAM_CDM, "CHANGE_BASE: 0x%X", p_cbase_cmd->base); Loading @@ -808,6 +856,7 @@ void cam_cdm_util_dump_cmd_buf( uint32_t *cmd_buf_start, uint32_t *cmd_buf_end) { uint32_t *buf_now = cmd_buf_start; uint32_t *buf_end = cmd_buf_end; uint32_t cmd = 0; if (!cmd_buf_start || !cmd_buf_end) { Loading @@ -823,16 +872,20 @@ void cam_cdm_util_dump_cmd_buf( case CAM_CDM_CMD_DMI: case CAM_CDM_CMD_DMI_32: case CAM_CDM_CMD_DMI_64: buf_now += cam_cdm_util_dump_dmi_cmd(buf_now); buf_now += cam_cdm_util_dump_dmi_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_REG_CONT: buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now); buf_now += cam_cdm_util_dump_reg_cont_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_REG_RANDOM: buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now); buf_now += cam_cdm_util_dump_reg_random_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_BUFF_INDIRECT: buf_now += cam_cdm_util_dump_buff_indirect(buf_now); buf_now += cam_cdm_util_dump_buff_indirect(buf_now, buf_end); break; case CAM_CDM_CMD_GEN_IRQ: buf_now += cam_cdm_util_dump_gen_irq_cmd(buf_now); Loading @@ -841,7 +894,8 @@ void cam_cdm_util_dump_cmd_buf( buf_now += cam_cdm_util_dump_wait_event_cmd(buf_now); break; case CAM_CDM_CMD_CHANGE_BASE: buf_now += cam_cdm_util_dump_change_base_cmd(buf_now); buf_now += cam_cdm_util_dump_change_base_cmd(buf_now, buf_end); break; case CAM_CDM_CMD_PERF_CTRL: buf_now += cam_cdm_util_dump_perf_ctrl_cmd(buf_now); Loading